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Not GP, but this might scratch your itch https://github.com/cnlohr/mini-rv32ima
It will eventually be in https://github.com/aappleby/Pinwheel but that repo is currently a mess.
Yes, exactly, the gcc port is a very old version, and the build process frequently breaks on more modern systems. I did fork it [0] and apply a couple of fixes a year or so back, but I seem the be the only one who cares now, and even I don't care enough to pour large amounts of time into it!
[0] https://github.com/robinsonb5/zpugcc
For me the most interesting thing about ZPU is that its instructions are only a single byte each, which means that while the CPU is much smaller than most RISC-V implementations, the code density is significantly better than RV32 code. (Compressed RISC-V code can beat ZPU, but adding the compressed instruction set to a RISC-V core increases its size quite a bit.)
I did play with the ZPU quite a bit 8 or 9 years ago, and forked the ZPU Small variant to create ZPUFlex [0]. I borrowed a number of ideas from ZPU when I created my own CPU Project, EightThirtyTwo [1], some years later.
[0] https://github.com/robinsonb5/ZPUFlex
Note that you can't compare LUT4 results (ZPU @ 440 LUTs) against LUT6 results (PicoRV32 @ 750 LUTs). The ZPU is remarkably small, and it's a bigger gap than a direct comparison shows.
SERV is a fair comparison, since it's architected for 4LUTs and I suspect the synthesis results come from iCE40 tools.
I have a contender in the "very small" space, too [1], although I don't claim it's as mature or complete as SERV. (If Minimax was excluded from your post on the basis of insanity, I'm OK with that.)
[1] https://github.com/gsmecher/minimax