hVHDL_example_project vs hVHDL_floating_point

hVHDL_example_project

An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs (by hVHDL)

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hVHDL_floating_point

high level VHDL floating point library for synthesis in fpga (by hVHDL)

Fpga floating-point Vhdl

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hVHDL_example_project		hVHDL_floating_point
	Project
10	Mentions	3
20	Stars	13
-	Growth	-
8.9	Activity	8.2
about 2 months ago	Latest Commit	17 days ago
VHDL	Language	VHDL
MIT License	License	MIT License

The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

hVHDL_example_project

Posts with mentions or reviews of hVHDL_example_project. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-01-27.

Designing with Lattice Diamond
1 project | /r/FPGA | 16 Apr 2023

https://github.com/hVHDL/hVHDL_example_project for instructions how to build it from tcl script
Vivado Project vs Non-Project Mode
2 projects | /r/FPGA | 27 Jan 2023
A couple of questions for the experts
2 projects | /r/FPGA | 22 Dec 2022
Due to the supply chain issue I want to migrate from Xilinx Artix 7 to Efinix
1 project | /r/FPGA | 18 Oct 2022
Changing dev flow from GUI to command line / scripting ?
2 projects | /r/FPGA | 3 Oct 2022
Folks who work as full time FPGA engineers, do you ever write any object oriented code?
1 project | /r/FPGA | 1 Aug 2022
Choice of Python HDL library
10 projects | /r/FPGA | 25 Jul 2022
Create a common bus between multiple components in VHDL
3 projects | /r/FPGA | 19 Jul 2022
Present day analogues for Handel C / Impulse C?
2 projects | /r/FPGA | 12 Jul 2022

hVHDL_floating_point

Posts with mentions or reviews of hVHDL_floating_point. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-11-27.

Generating pipeline stages automatically?
2 projects | /r/FPGA | 27 Nov 2022
Choice of Python HDL library
10 projects | /r/FPGA | 25 Jul 2022

The file has 86 lines, but this functionality could be implemented with just 10 lines of code by using a procedure call to create_first_order_filter which can is defined here https://github.com/hVHDL/hVHDL_floating_point/blob/main/float_first_order_filter/float_first_order_filter_pkg.vhd
How would you go about writing a pipeline with backpressure? - VHDL
1 project | /r/FPGA | 28 May 2022

What are some alternatives?

When comparing hVHDL_example_project and hVHDL_floating_point you can also consider the following projects:

pymtl3 - Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

rohd - The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

migen - A Python toolbox for building complex digital hardware

magma - magma circuits

hVHDL_fixed_point - VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.

PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

myhdl - The MyHDL development repository

litex - Build your hardware, easily!