Our great sponsors
-
hVHDL_example_project
An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs
-
InfluxDB
Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
-
pymtl3
Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
-
rohd
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
-
WorkOS
The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.
-
hVHDL_fixed_point
VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
I also happen to really believe in RTL design using high-level languages to enable software design techniques such as object orientation. My master's thesis was written entirely in Migen and I think it served me extremely well.
While I think Migen is a really nice library, it's also a pretty dead project, since the main people behind it moved over to Amaranth. It has one large upside in the fact Litex still uses it as the backend and they seem on the fence between moving over to Amaranth or rolling their own HDL library. For me Litex feels very important, but at the same time, my focus is on compute kernels and not some complicated NOCs.
MyHDL
PyMTL
The file has 86 lines, but this functionality could be implemented with just 10 lines of code by using a procedure call to create_first_order_filter which can is defined here https://github.com/hVHDL/hVHDL_floating_point/blob/main/float_first_order_filter/float_first_order_filter_pkg.vhd
Check out ROHD: https://github.com/intel/rohd
How this works in practice can be seen for example in a rom module. https://github.com/hVHDL/hVHDL_math_library/blob/main/sincos/lut_sine_pkg.vhd