hVHDL_floating_point
high level VHDL floating point library for synthesis in fpga (by hVHDL)
hVHDL_fixed_point
VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms. (by hVHDL)
| hVHDL_floating_point | hVHDL_fixed_point | |
|---|---|---|
| 3 | 3 | |
| 13 | 18 | |
| - | - | |
| 8.2 | 8.3 | |
| 23 days ago | 3 months ago | |
| VHDL | VHDL | |
| MIT License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
hVHDL_floating_point
Posts with mentions or reviews of hVHDL_floating_point.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-11-27.
- Generating pipeline stages automatically?
-
Choice of Python HDL library
The file has 86 lines, but this functionality could be implemented with just 10 lines of code by using a procedure call to create_first_order_filter which can is defined here https://github.com/hVHDL/hVHDL_floating_point/blob/main/float_first_order_filter/float_first_order_filter_pkg.vhd
- How would you go about writing a pipeline with backpressure? - VHDL
hVHDL_fixed_point
Posts with mentions or reviews of hVHDL_fixed_point.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-25.
-
Choice of Python HDL library
How this works in practice can be seen for example in a rom module. https://github.com/hVHDL/hVHDL_math_library/blob/main/sincos/lut_sine_pkg.vhd
- I would to have feedback on a video about object oriented design patterns in VHDL
What are some alternatives?
When comparing hVHDL_floating_point and hVHDL_fixed_point you can also consider the following projects:
hVHDL_example_project - An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs
pymtl3 - Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
rohd - The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
migen - A Python toolbox for building complex digital hardware
myhdl - The MyHDL development repository
magma - magma circuits
hVHDL_floating_point vs hVHDL_example_project
hVHDL_fixed_point vs pymtl3
hVHDL_floating_point vs rohd
hVHDL_fixed_point vs migen
hVHDL_floating_point vs migen
hVHDL_fixed_point vs rohd
hVHDL_floating_point vs myhdl
hVHDL_fixed_point vs magma
hVHDL_floating_point vs magma
hVHDL_fixed_point vs myhdl
hVHDL_floating_point vs pymtl3
hVHDL_fixed_point vs hVHDL_example_project