cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats. (by openhwgroup)
mrisc32-a1
A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA (by mrisc32)
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| cvfpu | mrisc32-a1 | |
|---|---|---|
| 1 | 3 | |
| 363 | 22 | |
| 5.0% | - | |
| 4.9 | 0.0 | |
| about 1 month ago | 8 months ago | |
| SystemVerilog | VHDL | |
| Apache License 2.0 | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
cvfpu
Posts with mentions or reviews of cvfpu.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-06-10.
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Got any good reads on floating point math design?
OpenHWGroup's CVFPU (SystemVerilog), this is used by the CV32E40P. I had a go with this but couldn't get it to synthesise in Quartus Prime Lite.
mrisc32-a1
Posts with mentions or reviews of mrisc32-a1.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-06-10.
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Got any good reads on floating point math design?
I saw a particularly efficient VHDL implementation in the mrisc32-a1, though this is lacking support for rounding modes. Together with the rest of the processor this is a very interesting project, I hope that the author progresses it further.
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Find the leading '0' Verilog question
Here is a different more logic gate:ish solution (in VHDL): https://github.com/mrisc32/mrisc32-a1/blob/master/rtl/alu/clz32.vhd
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Floating point unit in systemc
In my VHDL implementation I use the same iterative divider for integer and for floating-point: https://github.com/mrisc32/mrisc32-a1/blob/master/rtl/muldiv/div_impl.vhd
What are some alternatives?
When comparing cvfpu and mrisc32-a1 you can also consider the following projects:
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
hlsVHDL_floating_point
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL