cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python (by cocotb)
signalflip-js
verilator testbench w/ Javascript using N-API (by ameetgohil)
| cocotb | signalflip-js | |
|---|---|---|
| 28 | 3 | |
| 1,607 | 16 | |
| 2.4% | - | |
| 9.7 | 0.0 | |
| 1 day ago | 10 months ago | |
| Python | C++ | |
| BSD 3-clause "New" or "Revised" License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
cocotb
Posts with mentions or reviews of cocotb.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-07-04.
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Designing a Low Latency 10G Ethernet Core
The use of cocotb and pyuvm for verification
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How is Python used in test automation in embedded systems?
For FPGA/HDL work, there's cocotb
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Introducing CoHDL
At the moment, it is not possible to directly simulate synthesizable contexts. In principle, I could add a simulator to CoHDL. As a Python implementation, it would be orders of magnitude slower than other solutions. Instead, I am using Cocotb to validate the generated VHDL and for the unit tests in the GitHub repository. There is also some very, very experimental support for formal verification, but it will take some time for that to become usable.
- Use cocotb to test and verify chip designs in Python
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Trying to learn and work with FPGAs
On the topic of simulation, you don't have to restrict yourself to using Verilog or VHDL to write your test benches. For example, Verilator lets you write them in C++, cocotb lets you use Python, and if you use SpinalHDL you will drive the underlying simulator using Scala.
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Help understanding how this makefile works?
I know it might be difficult without much context, but this makefile is called by a top level makefile. very confused if lines 35-74 do anything. They seem to be a mix of real makefile syntax and just straight up comments. what do these lines do?
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COBS protocol decoder progress
Learn more about this here: https://www.cocotb.org/
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AXI-Stream meme
Also consider cocotb, this thread has some compelling arguments. I'd say as a student, learning industry tools isn't necessarily the best thing you could spend your time on. Getting fast at design AND verification, where you can maintain flow state and run better microexperiments means you will understand more, faster.
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cocotb
Have you tried looking at the mixed language example?
- We're trying to sort this out with some of our engineers, so please humor - Do you prefer VHDL or Verilog?
signalflip-js
Posts with mentions or reviews of signalflip-js.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-05-23.
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Open-source SystemVerilog simulation support using cocotb
I created my own framework for verilator testbenches in node-js - https://github.com/ameetgohil/signalflip-js
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How to simulate Verilog designs REALLY quickly ?
I made a package called signalflip-js which would be good fit especially for a web app. It wraps the verilator testbench with javascript. An interesting thing to try here would be to compile verilator to wasm and use the wasm binary. DM me if you pick this route and need help
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Verilator: Suggestions for verification framework?
I use signalflip-js, a framework I created using node-js before cocotb had verilator support. The framework has fairly efficient multi-clock support where it will only evaluate the model if there is an edge toggle. It also has phase support, kind of like UVM, where you can schedule tasks for Pre-run Phase, Reset Phase, Run Phase, and Post-run phase.
What are some alternatives?
When comparing cocotb and signalflip-js you can also consider the following projects:
cocotbext-axi - AXI interface modules for Cocotb
verilator - Verilator open-source SystemVerilog simulator and lint system
cocotb-test - Unit testing for cocotb
chisel - Chisel: A Modern Hardware Design Language
amaranth - A modern hardware definition language and toolchain based on Python
iverilog - Icarus Verilog
chiselverify - A dynamic verification library for Chisel.
teroshdl-documenter-demo - This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workflow.
SpinalHDL - Scala based HDL
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.