OpenROAD
chisel-template
| OpenROAD | chisel-template | |
|---|---|---|
| 7 | 1 | |
| 1,334 | 4 | |
| 4.1% | - | |
| 10.0 | 10.0 | |
| 4 days ago | about 1 year ago | |
| Verilog | Scala | |
| BSD 3-clause "New" or "Revised" License | BSD 3-clause "New" or "Revised" License |
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OpenROAD
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Importance of Open-Source EDA Tools for Academia
> [1]: https://theopenroadproject.org/
All it takes to check your point is to scroll down to the end and follow the link at the bottom of the page to the FOSSI foundation, who hosted this open letter, to realize that they have also developed some widely used EDA tools. Here's a link on case you have missed it
https://fossi-foundation.org/our-work/projects
- OpenROAD
- Ser programador científico en chile
- OpenROAD: Open IC Design Sythesis from Verilog
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I see that many open riscv cores use Scala that generate verilog. Is this common practice?
If you're interested in tools, I highly recommend going through the (Google-supported) OpenROAD toolset - these guys are building up a open-source infrastructure for the full digital flow: https://theopenroadproject.org/ .
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VLSI Tools
You can have a quick look at OpenROAD. It is open source but will take sometime to get started with.
chisel-template
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I see that many open riscv cores use Scala that generate verilog. Is this common practice?
Also it's not hard to start, there is a template provided by Chisel devs at https://github.com/freechipsproject/chisel-template or my own at https://github.com/carlosedp/chisel-template.
What are some alternatives?
OpenROAD-flow-scripts - OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
chisel-template - A template project for beginning new Chisel work
siliconcompiler - A modular build system for hardware
XiangShan - Open-source high-performance RISC-V processor
hammer - Hammer: Highly Agile Masks Made Effortlessly from RTL
caravel_fulgor_opamp - Test Chip General Purpose OpAmp using Skywater SKY130 PDK
tcl-opencl - Tcl extension for OpenCL
OpenSource-RoadMap-DataScience - ¡Camino a una educación autodidacta en Ciencia de Datos!
FPGA-SDcard-Reader - An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。