chisel-template
Chisel HDL Template Repository (by carlosedp)
chisel-template
A template project for beginning new Chisel work (by chipsalliance)
| chisel-template | chisel-template | |
|---|---|---|
| 1 | 1 | |
| 4 | 529 | |
| - | 2.3% | |
| 10.0 | 6.5 | |
| about 1 year ago | about 2 months ago | |
| Scala | Scala | |
| BSD 3-clause "New" or "Revised" License | The Unlicense |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
chisel-template
Posts with mentions or reviews of chisel-template.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-02-11.
-
I see that many open riscv cores use Scala that generate verilog. Is this common practice?
Also it's not hard to start, there is a template provided by Chisel devs at https://github.com/freechipsproject/chisel-template or my own at https://github.com/carlosedp/chisel-template.
chisel-template
Posts with mentions or reviews of chisel-template.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-02-11.
-
I see that many open riscv cores use Scala that generate verilog. Is this common practice?
Also it's not hard to start, there is a template provided by Chisel devs at https://github.com/freechipsproject/chisel-template or my own at https://github.com/carlosedp/chisel-template.
What are some alternatives?
When comparing chisel-template and chisel-template you can also consider the following projects:
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
XiangShan - Open-source high-performance RISC-V processor
OpenROAD - OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/