NyuziProcessor
Toast-RV32i
| NyuziProcessor | Toast-RV32i | |
|---|---|---|
| 10 | 2 | |
| 1,929 | 34 | |
| - | - | |
| 3.4 | 0.0 | |
| 9 days ago | about 1 year ago | |
| C | C | |
| Apache License 2.0 | - |
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NyuziProcessor
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Tiny GPU: A minimal GPU implementation in Verilog
Nice! I warmly encourage open-core GPU work.
Here's another: https://github.com/jbush001/NyuziProcessor
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FuryGpu – Custom PCIe FPGA GPU
There's also Nyuzi which is more GPGPU focused https://github.com/jbush001/NyuziProcessor, but the author also experimented with having it do 3D graphics.
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The WeeCee – Tiny Vortex86-Based DOS Gaming PC
You could probably layer a software implementation of the rasterization pipeline on top of a compute-focused open-source GPU architecture like Nyuzi: https://github.com/jbush001/NyuziProcessor/
I would expect a 2x slowdown over hardware rasterization, based on NVIDIA's work on such an approach, but this is probably fine if you're just trying to match Voodoo3 performance. And one could imagine bolting a minimal hardware rasterizer on top of Nyuzi to speed things up once the software implementation is working.
- FPGA as a GPU for Linux
- Nyuzi – An Experimental Open-Source FPGA GPGPU Processor
- An Experimental (Open-Source FPGA) GPGPU Processor called Nyuzi (by @jbush001)
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Exploring RustFFT's SIMD Architecture
Sounds like the Nyuzi processor :D
Toast-RV32i
- Intermediate FPGA project suggestions for resume
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RV32i RISCV processor for resume - Suggestions/feedback?
Github: https://github.com/georgeyhere/Toast-RV32i
What are some alternatives?
vdpau-va-driver-vp9 - Experimental VP9 codec support for vdpau-va-driver (NVIDIA VDPAU-VAAPI wrapper) and chromium-vaapi
riscv - RISC-V CPU Core (RV32IM)
openvga
quasiSoC - No-MMU Linux capable RISC-V SoC designed to be useful.
TrellisBoard - Ultimate ECP5 development board
spu32 - Small Processing Unit 32: A compact RV32I CPU written in Verilog
hardware - Verilog development and verification project for HOL4
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
ao486_MiSTer - ao486 port for MiSTer
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
OpenSimplex2 - C implementation for CPU and GPU of OpenSimplex 2
RISCV - A Pipelined RISC-V RV32I Core in Verilog [Moved to: https://github.com/georgeyhere/Toast-RV32i]