FPGA_RealTime_and_Static_Sobel_Edge_Detection
ULX3S_FPGA_Camera_Streaming
| FPGA_RealTime_and_Static_Sobel_Edge_Detection | ULX3S_FPGA_Camera_Streaming | |
|---|---|---|
| 3 | 1 | |
| 36 | 13 | |
| - | - | |
| 0.0 | 0.0 | |
| over 2 years ago | over 2 years ago | |
| Verilog | Verilog | |
| MIT License | MIT License |
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FPGA_RealTime_and_Static_Sobel_Edge_Detection
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Sobel edge detection
Hi, you might be interested on having a look at this project. The main RTL for the convolution is in sobel_convolution.v
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Share some github FPGA projects (bonus if they include C++, Python, or other files)
I posted this project on this sub three weeks ago,
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Real-Time Sobel Edge Detection using FPGA (repo link in the comments)
Project repository
ULX3S_FPGA_Camera_Streaming
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Camera Streaming with ULX3S FPGA Board and Icestudio
Hi, my new project uses the OV7670 camera to stream 640x480 @ 30fps via HDMI. The FPGA used here is the opensource FPGA board, ULX3S.
What are some alternatives?
litex - Build your hardware, easily!
FPGA_OV7670_Camera_Interface - Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps
SpinalHDL - Scala based HDL
ULX3S_FPGA_Sobel_Edge_Detection_OV7670 - Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board
verilog-ethernet - Verilog Ethernet components for FPGA implementation
SBusFPGA - Stuff to put a FPGA in a SBus system (SPARCstation)
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
WARP_Core - Wilson AXI RISCV Processor Core
EdgeDetectionAccelerator - FPGA-based Image Edge Detection Accelerator
verilog-wishbone - Verilog wishbone components
BYU_PYNQ_PR_Video_Pipeline - The Demo that was presented at FCCM.