FPGA_RealTime_and_Static_Sobel_Edge_Detection
FPGA_OV7670_Camera_Interface
| FPGA_RealTime_and_Static_Sobel_Edge_Detection | FPGA_OV7670_Camera_Interface | |
|---|---|---|
| 3 | 1 | |
| 34 | 37 | |
| - | - | |
| 0.0 | 0.0 | |
| over 2 years ago | over 2 years ago | |
| Verilog | Verilog | |
| MIT License | MIT License |
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FPGA_RealTime_and_Static_Sobel_Edge_Detection
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Sobel edge detection
Hi, you might be interested on having a look at this project. The main RTL for the convolution is in sobel_convolution.v
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Share some github FPGA projects (bonus if they include C++, Python, or other files)
I posted this project on this sub three weeks ago,
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Real-Time Sobel Edge Detection using FPGA (repo link in the comments)
Project repository
FPGA_OV7670_Camera_Interface
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OV7670 Camera Interface to VGA using FPGA
Here is the github repo
What are some alternatives?
litex - Build your hardware, easily!
ULX3S_FPGA_Camera_Streaming - Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board
SpinalHDL - Scala based HDL
FPGA_Book_Experiments - My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu
verilog-ethernet - Verilog Ethernet components for FPGA implementation
USB_C_Industrial_Camera_FPGA_USB3 - Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.
SBusFPGA - Stuff to put a FPGA in a SBus system (SPARCstation)
biriscv - 32-bit Superscalar RISC-V CPU
hdl - HDL libraries and projects
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
WARP_Core - Wilson AXI RISCV Processor Core