AobaAPI VS riscv-perf-model

The library can be found here: https://github.com/lsimic/AobaAPI - it is still in development and issues/bugs are likely to occour, and it is not yet really "feature-rich".

so(sorry for self-promotion) I decided to build my own 3D modeling library to provide functionality similar to that of BMesh. Currently it's not really feature rich, but it can create some complex meshes with a bit of work. You can find the library here https://github.com/lsimic/AobaAPI/tree/develop and some examples https://github.com/lsimic/AobaExamples here. It's written in C++ and builds fine on both Windows(With Visual Studio) and Linux(with clang). I'm doing this as a part of my master's thesis and the paper should be done within a week or so(hopefully), in which I go into detail about design and implementation of such libraries.

I 100% agree on verilator. It’s by far the most efficient tool for many simulation and verification needs. Hands down. Even more so if you are building CPUs

UVM definitely has its place still in verification flows. It for something as complex and flexible as a CPU for sure, it’s hard to beat the amount of cycles and coverage you get from verilator. (EDA license fees are a big part of that, but also the fact that verilator generates just C++ code you can integrate with the rest of your s/w flow is invaluable).

But: What is also important for CPU is good validation and compliance test, (random or replayed or directed) instruction stream generators, ISS to validate agains etc. There are so much more scenarios to check because a CPU needs to handle any sequence of any instructions flawlessly.

Those tools are also crucial. And they are being built or sold for RISC-V now too. And also: I much prefer combining those with verilator than with commercial eda tools. And don’t forget: before you start building a lot of RTL, you’ll typically will also build C based higher level performance models of the micro architecture, eg https://github.com/riscv-software-src/riscv-perf-model