How do you do automated testing of your HDL?

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA
Vhdl Verification systemverilog-hdl unit-testing Fpga

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  • vunit

    VUnit is a unit testing framework for VHDL/SystemVerilog

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

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