wbuart32
A simple, basic, formally verified UART controller (by ZipCPU)
videozip
A ZipCPU SoC for the Nexys Video board supporting video functionality (by ZipCPU)
| wbuart32 | videozip | |
|---|---|---|
| 4 | 1 | |
| 254 | 12 | |
| - | - | |
| 4.6 | 10.0 | |
| 3 months ago | over 4 years ago | |
| Verilog | Verilog | |
| GNU General Public License v3.0 only | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
wbuart32
Posts with mentions or reviews of wbuart32.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-11.
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C++ Verification Testbench Best-Practice Resources?
I have built a lot of open-source C++ tooling for design verification. You can find a lot of my C++ models posted on my Github. Example C++ models include: UART, SPI/DSPI/QSPI Flash, SD-Card (SPI-based interface), VGA Video, Ethernet MDIO, PS/2 mouse, OLED display, SDRAM and more. (I've even simulated PLLs using C++ models ...) I have also written extensively about doing so at ZipCPU.com.
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CDC interview question clarification
Try this one.
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AXI Stream basics for beginners, Here's a video I made because a bunch of people suggested I do something AXI!
For example, some time after I built my own first serial port transmitter and receiver, someone tried using them in composition: A host (i.e. PC) would transmit a bunch of data, get received by the FPGA, processed by the receiver, and then the data would be sent back to the host via the transmitter. This is a hard test to get right, and my own design failed at the task. (It only returned every other byte!) What I learned from this is that the transmitter must take exactly (10*BAUD_CLOCKS) to transmit a byte. That also means that READY must be high on the last clock cycle of the byte to avoid falling behind. Let's just say that my own serial port wasn't (initially) up to the task. Among other things, the serial port receivers output "VALID" was only one cycle long, and didn't get latched anywhere if the transmitter wasn't ready for it. As I recall, we spent many days scratching our heads at the problem. Eventually, the person using my FPGA switched his host to sending 2-stop bits and things started working. Later, and only a long time later, did I ever find the off-by-one bug in the STOP bit state. My point? Serial port composition is an exacting test, and therefore a good one to work with. You ought to try it.
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How can I get Verilator to Prompt for User Input?
The core component to the single simulated to TCP port can be found here, in uartsim.cpp. You can find a companion software program that will forward the same TCP port to a hardware serial port here, under the name netuart.cpp.
videozip
Posts with mentions or reviews of videozip.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-11.
-
C++ Verification Testbench Best-Practice Resources?
I have built a lot of open-source C++ tooling for design verification. You can find a lot of my C++ models posted on my Github. Example C++ models include: UART, SPI/DSPI/QSPI Flash, SD-Card (SPI-based interface), VGA Video, Ethernet MDIO, PS/2 mouse, OLED display, SDRAM and more. (I've even simulated PLLs using C++ models ...) I have also written extensively about doing so at ZipCPU.com.
What are some alternatives?
When comparing wbuart32 and videozip you can also consider the following projects:
zipcpu - A small, light weight, RISC CPU soft core
sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces
wbicapetwo - Wishbone to ICAPE interface conversion
vgasim - A Video display simulator
biriscv - 32-bit Superscalar RISC-V CPU
openarty - An Open Source configuration of the Arty platform
qspiflash - A set of Wishbone Controlled SPI Flash Controllers
FakePGA - Simulating Verilog designs on a microcontroller
arrowzip - A ZipCPU based demonstration of the MAX1000 FPGA board
dpll - A collection of phase locked loop (PLL) related projects