f4pga-arch-defs VS verible

QuickLogic [1] seems to support and target the open tool environment for their devices -especially the F4PGA [2] toolkit (known earlier as symbiflow). Others have mentioned Lattice FPGAs. But the impression I got from Lattice is that they like the development of open tools, but don't want to invest too much in it. QuickLogic on the other hand, contribute code and design directly to F4PGA project and allied ones like Migen.

[1]: https://www.quicklogic.com/software/qorc-mcu-efpga-fpga-open...

[2]: https://f4pga.org/

I note that F4PGA (formerly SymbiFlow) Project X-Ray folks are documenting Xilinx FPGAs, hopefully you will be able to replace your use of Vivado at some point:

https://f4pga.org/

FPGAs would be so much more useful if AMD(Xilinx)/Intel(Altera) just gave up trying to build there own tools and instead supported F4FPGA: https://f4pga.org

Have you looked at F4PGA? They are working on exactly that.

https://f4pga.org/

F4PGA In the world of FPGA tools, it is refreshing to be able to use the suite of open source tools provided by F4PGA. For now, it supports only Xilinx 7-Series, Lattice iCE40, Lattice ECP5 FPGAs and QuickLogic EOS S3 but the team behind the projet is working to support more targets.

F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3\ (19 comments)

In addition to open-source FPGA toolchains (e.g., https://f4pga.org/, GHDL, Verilator, Yosys, IceStudio, etc.), you _can_ actually run vendor/commercial tools (e.g., AMD/Xilinx Vivado) on M1/M2 macs, through virtualization (VM, or containers). Until quite recently, the only available option to run x86_64 on macOS/arm64 was QEMU (e.g., UTM, docker, lima). It worked but was pretty slow, especially for mammoths like Vivado, larger designs, and in case you needed the GUI. With the release of Ventura (currently at final betas), it’s possible to run Linux x86 binaries using rosetta 2, which is way faster than QEMU. I currently run Vivado 2022.1 on macOS/M1 Ventura, using UTM (https://mac.getutm.app/). It’s 100% usable and feels even faster and snappier than my Linux machine!

There are some FPGAs that have been _fully_ reverse engineered and now have open source toolchains, such as Lattice iCE40 and Lattice ECP5(-5G). Others are coming along, such as Xilinx 7 series and Lattice's Nexus FPGAs (CrossLink and Certus products).

See: https://f4pga.org/

As far as boards go, there are many, many out there. Some of my favorites are:

Alchitry Au: https://www.sparkfun.com/products/16527

Olimex iCE40HX8K-EVN: https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/ope...

ECP5-5G evaluation kit: https://www.latticesemi.com/products/developmentboardsandkit...

I want to write Verilog/SystemVerilog with neovim(I use Lazyvim,nvim-lspconfig,mason.nvim, mason-lspconfig.nvim and nvim-cmp) . Now I use Verible to format and lint. But it seems that it cannot complete the signals when I want to instance a module and type a "." . So is there a better way to interconnect modules?

BTW, I'd recommend checking out verible if you're looking for a flex/bison verilog parser.

You'll have to roll up your sleeves a bit, but Verible might be worth a look for a functional SystemVerilog parser that you could build off of. It's the only thing I'm aware of built for this class of tools (e.g. yosys is only synthesizable verilog) that's available and likely to cover a good amount of the spec.

https://github.com/chipsalliance/verible (may not do actual syntax checking)

You might be interested in this though.