icarus-verilog

Open-source projects categorized as icarus-verilog
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Language: + Python + Verilog + Makefile
Topics: Verilog yosys Systemverilog vivado Verilator
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Top 4 icarus-verilog Open-Source Projects

icarus-verilog

  • edalize

    An abstraction library for interfacing EDA tools

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  • neorv32-verilog

    ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

  • fusesoc_template

    Example of how to get started with olofk/fusesoc.

  • verilog_template

    A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

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Index

What are some of the best open-source icarus-verilog projects? This list will help you:

Project Stars
1 edalize 601
2 neorv32-verilog 45
3 fusesoc_template 12
4 verilog_template 1

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