Show HN: Naja-Verilog – Structural Verilog Parser

• naja-verilog

  2 21 7.6 C++

  A standalone structural (gate-level) verilog parser

  

• naja

  4 42 9.0 Python

  Structural Netlist API (and more) for EDA post synthesis flow development

  

The project's other github repo is better to learn more about the project: https://github.com/xtofalex/naja

The linked repo doesn't have a informative Readme. An example showing showing Naja differs from existing tools would help people unfamiliar with Electronic Design Automation, like me.

• InfluxDB

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