vhdl-axis-uart VS uart-for-fpga

Compare vhdl-axis-uart vs uart-for-fpga and see what are their differences.

vhdl-axis-uart

UART to AXI Stream interface written in VHDL (by fcayci)
Fpga Vhdl Uart axi-stream
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uart-for-fpga

Simple UART controller for FPGA written in VHDL (by jakubcabal)
Uart Fpga uart-controller Vhdl Controller wishbone wishbone-bus uart-loopback Simulation ghdl cyc1000
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vhdl-axis-uart uart-for-fpga
2 1
15 84
- -
0.0 0.0
over 1 year ago over 2 years ago
VHDL VHDL
MIT License MIT License
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vhdl-axis-uart

Posts with mentions or reviews of vhdl-axis-uart. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-01-06.

uart-for-fpga

Posts with mentions or reviews of uart-for-fpga. We have used some of these posts to build our list of alternatives and similar projects.
  • Entity bound SDC in Quartus
    1 project | /r/FPGA | 23 Apr 2022
    The code in the link below contains an example of my use of the altera_attribute: https://github.com/jakubcabal/uart-for-fpga/blob/master/examples/common/rst_sync.vhd

What are some alternatives?

When comparing vhdl-axis-uart and uart-for-fpga you can also consider the following projects:

mil1553-spi - MIL-STD-1553 <-> SPI bridge

fpu - IEEE 754 floating point library in system-verilog and vhdl

sdram-fpga - A FPGA core for a simple SDRAM controller.

cyc1000-rsu - The CYC1000 FPGA Remote System Upgrade project

vhdl-axis-uart vs mil1553-spi uart-for-fpga vs fpu uart-for-fpga vs sdram-fpga uart-for-fpga vs cyc1000-rsu