tiny-cores
Collection of assorted small cores (by fusesoc)
surf
A huge VHDL library for FPGA development (by slaclab)
| tiny-cores | surf | |
|---|---|---|
| 1 | 1 | |
| 9 | 288 | |
| - | 1.1% | |
| 10.0 | 8.7 | |
| over 3 years ago | 8 days ago | |
| Verilog | VHDL | |
| - | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
tiny-cores
Posts with mentions or reviews of tiny-cores.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-18.
surf
Posts with mentions or reviews of surf.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-18.
What are some alternatives?
When comparing tiny-cores and surf you can also consider the following projects:
opentitan - OpenTitan: Open source silicon root of trust
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
axi - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
chisel - Chisel: A Modern Hardware Design Language
basejump_stl - BaseJump STL: A Standard Template Library for SystemVerilog
fusesoc-cores - FuseSoC standard core library
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development