fpu
IEEE 754 floating point library in system-verilog and vhdl (by taneroksuz)
or1200
OpenRISC 1200 implementation (by openrisc)
fpu | or1200 | |
---|---|---|
1 | 1 | |
46 | 155 | |
- | 0.0% | |
6.1 | 10.0 | |
2 months ago | over 8 years ago | |
VHDL | Verilog | |
Apache License 2.0 | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
fpu
Posts with mentions or reviews of fpu.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-08.
-
High level floating point arithmetic in vhdl
Another really nice one that I found recently, uses a fused multiply add unit rather than seperate multiplier and adder. It's available in both mixed precision (double/single) and single precision flavours.
or1200
Posts with mentions or reviews of or1200.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-08.
-
High level floating point arithmetic in vhdl
Two good examples of open source FPUs are the venerable fpu100 (the original is VHDL but a Verilog version is used in OpenRISC's OR1200).
What are some alternatives?
When comparing fpu and or1200 you can also consider the following projects:
neorv32-setups - 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
uart-for-fpga - Simple UART controller for FPGA written in VHDL
spi-fpga - SPI master and SPI slave for FPGA written in VHDL
Hastlayer-SDK - Turning .NET software into FPGA hardware for faster execution and lower power usage.
VHDL-Guide - VHDL Guide
edalize - An abstraction library for interfacing EDA tools
pocket-cnn - CNN-to-FPGA-framework for small CNN, written in VHDL and Python
neorv32-riscof - ✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.