siliconcompiler
A modular build system for hardware (by siliconcompiler)
OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/ (by The-OpenROAD-Project)
siliconcompiler | OpenROAD | |
---|---|---|
3 | 7 | |
774 | 1,334 | |
3.4% | 4.1% | |
9.9 | 10.0 | |
1 day ago | 7 days ago | |
Python | Verilog | |
Apache License 2.0 | BSD 3-clause "New" or "Revised" License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
siliconcompiler
Posts with mentions or reviews of siliconcompiler.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-12-14.
OpenROAD
Posts with mentions or reviews of OpenROAD.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-03-11.
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Importance of Open-Source EDA Tools for Academia
> [1]: https://theopenroadproject.org/
All it takes to check your point is to scroll down to the end and follow the link at the bottom of the page to the FOSSI foundation, who hosted this open letter, to realize that they have also developed some widely used EDA tools. Here's a link on case you have missed it
https://fossi-foundation.org/our-work/projects
- OpenROAD
- Ser programador cientÃfico en chile
- OpenROAD: Open IC Design Sythesis from Verilog
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I see that many open riscv cores use Scala that generate verilog. Is this common practice?
If you're interested in tools, I highly recommend going through the (Google-supported) OpenROAD toolset - these guys are building up a open-source infrastructure for the full digital flow: https://theopenroadproject.org/ .
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VLSI Tools
You can have a quick look at OpenROAD. It is open source but will take sometime to get started with.
What are some alternatives?
When comparing siliconcompiler and OpenROAD you can also consider the following projects:
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
OpenROAD-flow-scripts - OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/