rv16poc VS fpu

Compare rv16poc vs fpu and see what are their differences.

rv16poc

16 bit RISC-V proof of concept (by AntonMause)
Vhdl risc-v
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fpu

IEEE 754 floating point library in system-verilog and vhdl (by taneroksuz)
Fpu Hardware risc-v system-verilog Vhdl Verilog Fpga
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rv16poc fpu
1 1
15 46
- -
4.1 6.1
11 months ago about 2 months ago
VHDL VHDL
Apache License 2.0 Apache License 2.0
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

rv16poc

Posts with mentions or reviews of rv16poc. We have used some of these posts to build our list of alternatives and similar projects.

fpu

Posts with mentions or reviews of fpu. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-08-08.
  • High level floating point arithmetic in vhdl
    3 projects | /r/FPGA | 8 Aug 2022
    Another really nice one that I found recently, uses a fused multiply add unit rather than seperate multiplier and adder. It's available in both mixed precision (double/single) and single precision flavours.

What are some alternatives?

When comparing rv16poc and fpu you can also consider the following projects:

neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

neorv32-setups - 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.

fpu-sp - IEEE 754 floating point library in system-verilog and vhdl

uart-for-fpga - Simple UART controller for FPGA written in VHDL

or1200 - OpenRISC 1200 implementation

spi-fpga - SPI master and SPI slave for FPGA written in VHDL

Hastlayer-SDK - Turning .NET software into FPGA hardware for faster execution and lower power usage.

VHDL-Guide - VHDL Guide

edalize - An abstraction library for interfacing EDA tools

pocket-cnn - CNN-to-FPGA-framework for small CNN, written in VHDL and Python

neorv32-riscof - ✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.

rv16poc vs neorv32 fpu vs neorv32-setups fpu vs fpu-sp fpu vs uart-for-fpga fpu vs or1200 fpu vs spi-fpga fpu vs Hastlayer-SDK fpu vs VHDL-Guide fpu vs edalize fpu vs pocket-cnn fpu vs neorv32-riscof