rv16poc
16 bit RISC-V proof of concept (by AntonMause)
simple-riscv
A simple three-stage RISC-V CPU (by hamsternz)
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| rv16poc | simple-riscv | |
|---|---|---|
| 1 | 5 | |
| 15 | 19 | |
| - | - | |
| 4.1 | 2.7 | |
| 11 months ago | almost 3 years ago | |
| VHDL | VHDL | |
| Apache License 2.0 | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
rv16poc
Posts with mentions or reviews of rv16poc.
We have used some of these posts to build our list of alternatives
and similar projects.
simple-riscv
Posts with mentions or reviews of simple-riscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-23.
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How to run DOOM on a custom-made CPU in VHDL
Have a look at https://github.com/hamsternz/simple-riscv/tree/main/sw for how I did this for my toy processor. In particular https://github.com/hamsternz/simple-riscv/tree/main/sw/image_to_mem does the heavy lifting.
- Running VIVADO project from batch- linux , by using tcl file.
- Looking for an rv32i asm program that covers all possible scenarios of all instructions for testing
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Is a single cycle CPU of any use besides learning?
If you want to see my ISA testing source have a look at: https://github.com/hamsternz/simple-riscv/blob/main/sw/asm/isa_test.S
What are some alternatives?
When comparing rv16poc and simple-riscv you can also consider the following projects:
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
neo430 - :computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
riscv-tests
riscv-formal - RISC-V Formal Verification Framework
rp32 - RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).
Cores-VeeR-EH1 - VeeR EH1 core