prjxray
f4pga-examples
| prjxray | f4pga-examples | |
|---|---|---|
| 8 | 1 | |
| 736 | 260 | |
| 0.7% | 0.8% | |
| 8.4 | 4.3 | |
| 11 days ago | about 1 month ago | |
| Python | Verilog | |
| ISC License | Apache License 2.0 |
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prjxray
- AMD Proposes an FPGA Subsystem User-Space Interface for Linux
- OpenPOWER Foundation Demoes the LibreBMC Power-Based Open-Source BMC
-
Using FPGAs for CyberSecurity/Cryptography.
There are many applications to FPGA security. You could use Project X-Ray to reverse engineer and edit a bitstream. You could learn how to use encrypted bitstreams to prevent someone from reverse engineering and editing your own bitstream. You could perform a side channel attack on an FPGA.
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NiteFury – An Artix-7 FPGA with its own DDR3 RAM right in your laptop (2019)
A bit of a nitpick - LiteX still needs Vivado installed for now for 7 series FPGAs. There's a project that's very far along in reverse engineering the Xilinx bitstream (https://github.com/f4pga/prjxray), but it's still missing many features (PCIe, SERDES, etc.).
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Partial reconfiguration safety problems
this information is not difficult to extract. maybe make a donation to https://github.com/f4pga/prjxray or appeal to their vanity. they can probably write such a script in an hour or two.
- Symbiflow: The GCC of the FPGA World
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The J1 Forth CPU
Here is a project to reverse engineer the Xilinx series 7 FPGAs to be able to target them with open source tools:
https://github.com/SymbiFlow/prjxray
f4pga-examples
What are some alternatives?
openFPGALoader - Universal utility for programming FPGA
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
FPGA-Ping-Pong-game - Simple Ping Pong game on Xilinx Spartan 3E
zipcpu - A small, light weight, RISC CPU soft core
f4pga - FOSS Flow For FPGA
litex - Build your hardware, easily!
prjtrellis - Documenting the Lattice ECP5 bit-stream format.
sphinxcontrib-hdl-diagrams - Sphinx Extension which generates various types of diagrams from Verilog code.
icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
hdl - HDL libraries and projects