osblog
riscv-elf-psabi-doc

osblog | riscv-elf-psabi-doc | |
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3 | 12 | |
517 | 735 | |
- | 1.6% | |
0.0 | 6.2 | |
over 2 years ago | 22 days ago | |
Rust | Python | |
MIT License | Creative Commons Attribution 4.0 |
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osblog
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My RISC-V OSDev journey, so far
How to automate building and running the project using make; in particular, leveraging variables in the Makefile to elegantly apply the same command line options for compiling each file in the codebase - because trust me, you'll need a ton of command-line options ;-) For this, I based my initial Makefile on that found in the source code for "The Adventures of OS", e.g. this
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Getting started with OSDev on RISC-V
I would like to thank the authors of RISC-V from scratch and The Adventures of OS for their high-quality articles that go into great detail on how RISC-V works. Without their well-written articles, I wouldn't have known how to get started with kernel development on RISC-V. My initial project setup - the minimal C runtime crt0.s in assembly and the linker script riscv64-virt.lds - is based on the former, while my UART driver code is adapted from the latter and I intend to closely follow the latter going forward.
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RV32I Stack and stack pointer in hardware implementation
Here's an example of an interrupt routine (m_trap_vector): https://github.com/sgmarz/osblog/blob/master/risc_v/src/asm/trap.S
riscv-elf-psabi-doc
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An Introduction to Low-Latency Scripting for Game Engines
I agree; wasm would be a better choice, as it's specifically designed for this use case. RISC-V is designed for hardware implementation, not to be an IR, which means that things are more verbose than they need to be. For example, accessing an arbitrary 64-bit address requires 6 instructions [1] in RISC-V, whereas in Wasm you can just do it. Even more important than ISA differences, though, is that with Wasm you get WASI, which saves you a whole lot of time creating a sandboxed system interface.
[1]: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/38...
- ARM64EC (and ARM64X) Explained
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Lazarus IDE 3.0 Released
Sure. It's the section here https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/ma...
It's that structs of two simple fields need to be passed in registers. And more specifically that this rule is relevant for mixed integer and floating point fields.
It's a very specific rule that requires a ton of code to implement compared to the integer calling convention. And again like the weird AMD64 convention likely invented to squeeze out a theoretical few cycles that never occur outside microbenchmarks
- Please help!
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RISC-V assembler input file format
This one has more info on the ELF output, notably things like how things like relocations and special symbols like %pcrel_hi work: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
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RISC-V assembly example: incrementing each char in a string
This is a bit dense but that's what I referred to https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc. I'm not sure if there's a RISC-V specific assembly tutorial that talks about calling conventions.
- RISCV on the rise. Intel joins the bandwagon. Threat or potential for linux gaming?
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RV32I Stack and stack pointer in hardware implementation
The stack is defined by the ABI and it’s a purely software convention. It’s possible a program could use a different convention. FYI, the EBI is defined here: https://github.com/riscv-non-isa/riscv-elf-psabi-doc
- If you were to start your coding journey from zero, what would be your plan?
- Need reaources to learn Assembly
What are some alternatives?
avr-device - Register access crate for AVR microcontrollers
lz4_rv32i_decode - LZ4 decoder in assembly for RiscV RV32IC
riscv-from-scratch - The code for the RISC-V from scratch blog post series.
open-source-cs - Video discussing this curriculum:
riscv - Container image for RISC-V
riscv-asm-manual - RISC-V Assembly Programmer's Manual
marvelos - Marvelous RISC-V Operating System, by donaldsebleung
riscv-isa-manual - RISC-V Instruction Set Manual
awesome-riscv - 😎 A curated list of awesome RISC-V implementations
arduino-6502ctl - Arduino 6502 Controller
book - The Rust Programming Language
lz4_rv32i_decode - LZ4 decoder in assembly for RiscV RV32IC
