ndk-app-minimal
Minimal Application based on Network Development Kit (NDK) for FPGA cards (by CESNET)
surf
A huge VHDL library for FPGA development (by slaclab)
| ndk-app-minimal | surf | |
|---|---|---|
| 4 | 1 | |
| 23 | 285 | |
| - | 1.1% | |
| 8.2 | 8.7 | |
| 17 days ago | 5 days ago | |
| VHDL | VHDL | |
| BSD 3-clause "New" or "Revised" License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
ndk-app-minimal
Posts with mentions or reviews of ndk-app-minimal.
We have used some of these posts to build our list of alternatives
and similar projects.
-
A simple high-throughput open-source packet generator
as the title says, I'm looking to build a simple packet generator (a PCAP (re)player might be a better term), mainly for load-testing network devices. The goal is to be able to fully congest a 400G Ethernet line. To achieve such a high throughput rate, I plan to use the NDK platform to build my application.
-
Xilinx alternatives??
We have few Intel Agilex I-Series FPGA boards in our lab. It can do 400G Ethernet 8x56Gb or 4x112Gb (F-Tile), PCIe Gen5 x16 (R-Tile) and CXL IP is for a fee, I think. You can find an example of using F/R-Tile in our open-source NDK: https://github.com/CESNET/ndk-app-minimal
- The Network Development Kit for FPGA cards in version 0.3.1 released
- The Network Development Kit for FPGA cards released as open-source
surf
Posts with mentions or reviews of surf.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-18.
What are some alternatives?
When comparing ndk-app-minimal and surf you can also consider the following projects:
projf-explore - Project F brings FPGAs to life with exciting open-source designs you can build on.
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
chisel - Chisel: A Modern Hardware Design Language
tiny-cores - Collection of assorted small cores
basejump_stl - BaseJump STL: A Standard Template Library for SystemVerilog
fusesoc-cores - FuseSoC standard core library
axi - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
opentitan - OpenTitan: Open source silicon root of trust