hVHDL_floating_point
magma
hVHDL_floating_point | magma | |
---|---|---|
3 | 3 | |
13 | 239 | |
- | - | |
8.2 | 8.6 | |
23 days ago | about 1 month ago | |
VHDL | Python | |
MIT License | GNU General Public License v3.0 or later |
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hVHDL_floating_point
- Generating pipeline stages automatically?
-
Choice of Python HDL library
The file has 86 lines, but this functionality could be implemented with just 10 lines of code by using a procedure call to create_first_order_filter which can is defined here https://github.com/hVHDL/hVHDL_floating_point/blob/main/float_first_order_filter/float_first_order_filter_pkg.vhd
- How would you go about writing a pipeline with backpressure? - VHDL
magma
What are some alternatives?
hVHDL_example_project - An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs
rohd - The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
migen - A Python toolbox for building complex digital hardware
hVHDL_fixed_point - VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
pymtl3 - Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
myhdl - The MyHDL development repository
litex - Build your hardware, easily!