vISA
By gitlab-VitalMixofNutrients
microwatt
A tiny Open POWER ISA softcore written in VHDL 2008 (by antonblanchard)
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| vISA | microwatt | |
|---|---|---|
| 19 | 19 | |
| - | 643 | |
| - | - | |
| - | 6.7 | |
| - | 17 days ago | |
| Verilog | ||
| - | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
vISA
Posts with mentions or reviews of vISA.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-27.
- My Six Lines of Verilog Code Turing Complete BitBitJump Is Now Under the GPLv3
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1-bit CPU for 'super low-performance computer' launched – sells out promptly
Speed test against my six lines of verilog cpu when? *
https://gitlab.com/VitalMixofNutrients/vISA
* Only six lines of verilog if one only uses FPGA LUTs as Ram.
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Hey I'm genuinely curious about what makes you guys like working.
Well, I made a CPU Instruction Set Architecture called Bit-Bit-Jump that can simulate Bit-Bit-Jump Machine Code at approximately 5.6 Megahertz here: https://gitlab.com/VitalMixofNutrients/vISA
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What is easier for programmers to understand? An entire program that was written in one source code file, or an entire directory of source code files getting statically / dynamically linked into an entire program?
Hello. Over the past six months, I have been working on a CPU ISA named Bit-Bit-Jump. Suprisingly, it is actually the world's simplest CPU ISA, comprising only SIX lines of Verilog code.
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Error: Unsupported tristate construct (not in propagation graph):
You're right, it doesn't look like an actual binary.. How can I turn it into an actual binary?
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What is your take on ISA architectures for FPGAs (x86, arm, risc-v)?
Well, the simplest ISA is six lines of Verilog and it's called Bit-Bit-Jump
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MSc thesis topic advice related with fpga.
Idea: Because I don't have the money for Vivado (Free version is limited to a few thousand lines of Verilog) / Quartus (Free version won't let me perform DPR), it would be awesome if you could find a way to implement my Bit-Bit-Jump Soft-Core into your project. Here's my project: https://gitlab.com/VitalMixofNutrients/vISA (Licensed under GPLv2 Only.)
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When you implement an CPU ISA (Bit-Bit-Jump) in only six lines of Verilog:
My BBJ code is available here: https://gitlab.com/VitalMixofNutrients/vISA/-/raw/vISA/sources/sim/verilator/BBJ/BBJ.v (Licensed under GPLv2 only.)
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What architecture is the most chad?
Bit-Bit-Jump.
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Anon can't get a job
(My coding project in question: https://gitlab.com/VitalMixofNutrients/vISA)
microwatt
Posts with mentions or reviews of microwatt.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-10-21.
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Microwatt: A tiny Open POWER ISA softcore written in VHDL 2008
My favorite part of this project is the pretty large battery of test cases. A lot of chip rtl releases don't bother with open sourcing the verification too, and that's arguably more useful than the rtl in the first place.
https://github.com/antonblanchard/microwatt/tree/master/test...
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Arm wants to charge dramatically more for chip licenses
MicroWatt is the only one I know of.
https://github.com/antonblanchard/microwatt
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RISC-V Pushes into the Mainstream
I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers.
If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.
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How long until RISC gets adopted for the desktop?
Not true, as of 2019 the power ISA is able to be used without needing to pay any royalties to ibm under the openpower foundation. There's already a few projects that have taken advantage of it such as libreSOC and Microwatt. Source code for various firmware components are also freely available pertaining to the power platform.
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Build Open Silicon with Google
https://github.com/antonblanchard/microwatt is an example of a Linux-capable 64-bit core that has been submitted on multiple Open MPW shuttles:
- Any raw binary generic platform-agnostic test roms for PowerPC?
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What would you think if the Amiga line jumped from PowerPc to RISC-V CPUs?
GitHub https://github.com/openpower-cores https://github.com/antonblanchard/microwatt
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Keeping POWER relevant in the open source world
At the other end of the scale, if anyone wants to play you can run a little openpower CPU on a FPGA with completely open source. https://github.com/antonblanchard/microwatt
It's capable of running Linux, some example docs are https://shenki.github.io/boot-linux-on-microwatt/
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What is your take on ISA architectures for FPGAs (x86, arm, risc-v)?
Why dismiss POWER or SPARC ? :-)
What are some alternatives?
When comparing vISA and microwatt you can also consider the following projects:
ao486_MiSTer - ao486 port for MiSTer
chiselwatt - A tiny POWER Open ISA soft processor written in Chisel
VexRiscvBPluginGenerator
midimonster - Multi-protocol control & translation software (ArtNet, MIDI, OSC, sACN, ...)
verilator - Fork of Verilator with prebuilt Ubuntu binaries (https://www.veripool.org/wiki/verilator)
Apollo-11 - Original Apollo 11 Guidance Computer (AGC) source code for the command and lunar modules.
dcc - Dan's C compiler
OpenSkyStacker - Multi-platform stacker for deep-sky astrophotography.
Smallpond - Brand new RISC architecture created in CSE 490
beri - The BERI and CHERI processor and hardware platform
librealsense - Intel® RealSense™ SDK