RISC-V Pushes into the Mainstream

• rocket-chip

  12 3,002 8.3 Scala

  Rocket Chip Generator

  

You could do a trial build of an in-order Rocket RISC-V core [1] to see how much space it takes up.

[1] https://github.com/chipsalliance/rocket-chip

• microwatt

  19 643 6.7 Verilog

  A tiny Open POWER ISA softcore written in VHDL 2008

I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers.

If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.

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• ibex

  20 1,244 8.3 SystemVerilog

  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  

Ibex is open source and has taped out - https://github.com/lowRISC/ibex

• openc906

  14 283 1.3 Verilog

  OpenXuantie - OpenC906 Core

  

I wouldn't quite say that's the case. Two of the three full Linux capable RISC-V SoC releases this year are using open source CPU cores. The BL808 and the Allwinner D1 both use T-Head CPU cores that are available on GitHub https://github.com/T-head-Semi/openc906 . The JH7110 in the VisionFive2 and Star 64 does use a closed CPU core however.

• XiangShan

  32 4,305 9.3 Scala

  Open-source high-performance RISC-V processor

  

> Because at this point they have more to gain than by keeping them proprietary. RISC-V is not yet overall competitive with ARM. So it's not like these RISC-V cores could be commercialized that successfully. Keeping them open probably makes further development faster.

This open source core is about equivalent to a Cortex-X1. https://github.com/OpenXiangShan/XiangShan

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