fiate
Fault Injection Automatic Test Equipment (by byuccl)
FPGA_RealTime_and_Static_Sobel_Edge_Detection
Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images (by AngeloJacobo)
fiate | FPGA_RealTime_and_Static_Sobel_Edge_Detection | |
---|---|---|
4 | 3 | |
7 | 36 | |
- | - | |
0.0 | 0.0 | |
over 2 years ago | over 2 years ago | |
VHDL | Verilog | |
Apache License 2.0 | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
fiate
Posts with mentions or reviews of fiate.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-14.
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Building xvc_pup device drivers from the source.
Try this: https://github.com/byuccl/fiate/blob/main/host_sw/xvc.py There are other GitHub examples as well. https://github.com/search?q=xilinx+virtual+cable
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Help setting up Xilinx Artix-7 FPGA (RHS Labs Litefury FPGA board)
Here is my Github work with the SQRL Acorn (same design as the litefury): https://github.com/byuccl/fiate
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SPI flash command set specification
I have that part in a few SQRL acorn FPGAs. Here is my python wrapper for the Xilinx QSPI device. https://github.com/byuccl/fiate/blob/main/host_sw/qspi.py
- Share some github FPGA projects (bonus if they include C++, Python, or other files)
FPGA_RealTime_and_Static_Sobel_Edge_Detection
Posts with mentions or reviews of FPGA_RealTime_and_Static_Sobel_Edge_Detection.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-05-09.
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Sobel edge detection
Hi, you might be interested on having a look at this project. The main RTL for the convolution is in sobel_convolution.v
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Share some github FPGA projects (bonus if they include C++, Python, or other files)
I posted this project on this sub three weeks ago,
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Real-Time Sobel Edge Detection using FPGA (repo link in the comments)
Project repository
What are some alternatives?
When comparing fiate and FPGA_RealTime_and_Static_Sobel_Edge_Detection you can also consider the following projects:
verilog-ethernet - Verilog Ethernet components for FPGA implementation
litex - Build your hardware, easily!