amaranth
pygears
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amaranth | pygears | |
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7 | 5 | |
1,436 | 143 | |
4.0% | - | |
9.7 | 0.0 | |
6 days ago | 10 months ago | |
Python | Python | |
BSD 2-clause "Simplified" License | MIT License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
amaranth
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Why are there only 3 languages for FPGA development?
He probably meant Amaranth.
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VRoom A high end RISC-V implementation
As an aside, the latest and active development of nMigen has been rebranded a few months ago to Amaranth and can be found here: https://github.com/amaranth-lang/amaranth . In case people googled nMigen and came to the repository that hasn't been updated in two years.
- NMigen – A Python toolbox for building complex digital hardware (FPGAs)
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Facts every web dev should know before they burn out and turn to painting
Hmm. A followup question: are there any cheats/hacks that would make it possible (if painful) to for example explore the world of USB3, PCIe, or Linux on low-end-ish ARM (eg https://www.thirtythreeforty.net/posts/2019/12/my-business-c..., based on the 533MHz https://linux-sunxi.org/F1C100s), without needing to buy equipment in the mid-4-figure/low-5-figure range, if I were able to substitute a statistically larger-than-average amount of free time (and discipline)?
For example, I learned about https://github.com/GlasgowEmbedded/glasgow recently, a bit of a niche kitchen sink that uses https://github.com/nmigen/nmigen/ to lower a domain-specific subset of Python 3 (https://nmigen.info/nmigen/latest/lang.html) into Verilog which then runs on the Glasgow board's iCE40HX8K. The project basically makes it easier to use cheap FPGAs for rapid iteration. (The README makes a point that the synthesis is sufficiently fast that caching isn't needed.)
In certain extremely specific situations where circumstances align perfectly (caveat emptor), devices like this can sometimes present a temporary escape to the inevitable process of acquiring one's first second-hand high-end oscilloscope (fingers-crossed the expensive bits still have a few years left in them). To some extent they may also commoditize the exploration of very high-speed interfaces, which are rapidly becoming a commonplace principal of computers (eg, having 10Gbps everywhere when USB3.1 hits market saturation will be interesting) faster than test and analysis kit can keep up (eg to do proper hardware security analysis work). The Glasgow is perhaps not quite an answer to that entire statement, but maybe represents beginning steps in that sort of direction.
So, to reiterate - it's probably an unhelpfully broad question, and I'm still learning about the field so haven't quite got the preciseness I want yet, but I'm curious what gadgetry, techniques, etc would perhaps allow someone to "hack it" and dive into this stuff on a shoestring budget? :)
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Awesome Lattice FPGA Boards
Worth knowing that are two "nmigen"s nowadays - the one originated in M-Labs and one under a project also called nmigen:
https://github.com/nmigen/nmigen
It's a fork, made for reasons, but more actively developed. whitequark (long time author/contributor) works on this fork, and no longer the M-Labs version.
- Chisel/Firrtl Hardware Compiler Framework
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Unifying the CUDA Python Ecosystem
Sounds like nmigen might be a good open source successor to the project that you describe: https://github.com/nmigen/nmigen
pygears
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UCLA Adopts PyGears, an Open Source Framework for FPGA AI Design
More about it can be found here: https://github.com/bogdanvuk/pygears/tree/master/pygears/hls
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[FOSS] PyGears - Python framework za razvoj i akceleraciju HW distribuiranih sistema
Dok sajt samog projekta mozete naci na: www.pygears.org
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What is the field of AI acceleration like?
I'm currently part of OpenSource project called PyGears: www.pygears.org
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How profitable is it to sell FPGA IP Cores? Do you think this is a good thing for a startup?
Also, we open-sourced part of our tools, among them is our PyGears - a free framework that lets you design hardware using high-level Python constructs and compiles it to synthesizable SystemVerilog or Verilog code.
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PyGears - a functional approach to augmenting RTL methodology
Get source from GitHub: 📷GitHub - bogdanvuk/pygears: HW Design: A Functional Approach
What are some alternatives?
SpinalHDL - Scala based HDL
PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
skillbridge - A seamless python to Cadence Virtuoso Skill interface
chisel - Chisel: A Modern Hardware Design Language
rohd - The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
chiselverify - A dynamic verification library for Chisel.
branding - Rocky Linux's official branding assets
myhdl - The MyHDL development repository
FPGA_HW_SIM_FWK_2 - FPGA Hardware Simulation Framework
clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler
PeakRDL-uvm - Generate UVM register model from compiled SystemRDL input