Jupyter Scala
chisel
Jupyter Scala | chisel | |
---|---|---|
6 | 25 | |
1,562 | 3,717 | |
0.0% | 1.1% | |
9.0 | 9.7 | |
14 days ago | 5 days ago | |
Scala | Scala | |
BSD 3-clause "New" or "Revised" License | Apache License 2.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Jupyter Scala
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💐 Making VSCode itself a Java REPL 🔁
Checkout almond
- A Python-compatible statically typed language erg-lang/erg
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EDA libraries for Scala and Spark?
What about https://github.com/alexarchambault/plotly-scala and https://almond.sh/
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Is there any editor or IDE that supports Ammonite with inline dependencies?
I use Almond in JupyterLab, which has pretty solid code completion. In IntelliJ, you can create a scratch sc file and run lines of it in the Scala REPL. That's really convenient for code completion and I normally will use that when I'm testing something from a specific project.
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Recommended option for "Java with different syntax"?
The UI part. There's only the scala REPL. I think the closest is a scala kernel for Jupyter notebooks, check this out: https://almond.sh/
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An SQL Solution for Jupyter
We have used https://almond.sh/ to create a Spark SQL interpreter using Jupyter Notebooks - plus a whole lot more which you can see here: https://arc.tripl.ai/tutorial
After seeing many companies writing ETL using code we decided it was too hard to manage at scale so provided this abstraction layer - which is heavily centered around expressing business logic in SQL - to standardise development (JupyterLab) and allow rapid deployments.
chisel
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Calyx: Intermediate Language for Hardware Accelerators
My first instinct was to ask "Does this play well with CIRCT?" And thankfully they answer that right away in the README.
I'm personally of the opinion that there is a LOT of room for improvement in the hardware design tooling space, but a combination of market consolidation, huge pressure to meet deadlines, and an existing functional pipeline of Verilog/VHDL talent is preventing changes.
That's not to say "Verilog/VHDL are bad", because clearly they've been good enough to support nearly all of the wonderful designs powering today's devices. But it is to say, "the startup scene for hardware will continue to look anemic compared to the SaaS scene until someone gives me all of the niceties I have for building SaaS tools in software."
A huge amount of ideas (and entire designs) start off as software sims, which enables kernel/compiler engineers to start building out support for new hardware before it's manufactured.
There is some interesting work going on at SiFive building hardware with Chisel[1], as well as some interesting work lead by a professor at William and Mary to improve simulations[2].
1: https://www.chisel-lang.org
2: https://github.com/sarchlab/akita
- Chisel: A Modern Hardware Design Language
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I may be creating an abomination
Inspired by Scala. Which can do a whole lot more, and worse. The currently biggest competitor to decades old hardware description languages is a Scala DSL.
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An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs
Already mentioned Chisel: https://www.chisel-lang.org/
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Trying to learn and work with FPGAs
I'm also a hobbyist. There are a number of alternative HDLs out there, and as hobbyists we can deviate more from the mainstream of (System)Verilog and VHDL if we desire, though you'll still need to be able to read them. In the past I've done Verilog, but lately I've been using SpinalHDL and have been really enjoying it. Its close relative Chisel also makes appearances in the RISC-V space.
- Alternate HDL language and Physical Design/EDA tools?
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Learning VDHL after knowing Verilog
What are your thoughts on other HDLs like Chisel or BlueSpec when it comes to better type checking?
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Learning Verilog and FPGA
I started playing with FPGAs and HDLs a couple years ago with no hardware design background (I'm mostly a software architect/engineer) and in the end found that a "higher-level" HDL suited me better.
I chose Chisel (https://www.chisel-lang.org/) an HDL based on Scala (technically a Scala DSL) which can provide many facilities to hardware generation.
I'd highly advise looking into it although also knowing Verilog helps a lot.
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If you keep clicking "Give 15 seconds" on Lichess, eventually it overflows to a negative number and you win
But some go further and ask "what if when we add a soldering station on top of it?"
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What universities have good PhD programmes in digital design?
In recent years Chisel HDL, RISC V, and SiFive came out of their architecture group, to name a few.
What are some alternatives?
sparkmagic - Jupyter magics and kernels for working with remote Spark clusters
SpinalHDL - Scala based HDL
Metals - Scala language server with rich IDE features 🚀
myhdl - The MyHDL development repository
Vegas - The missing MatPlotLib for Scala + Spark
amaranth - A modern hardware definition language and toolchain based on Python
Apache Flink - Apache Flink
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Deeplearning4j - Suite of tools for deploying and training deep learning models using the JVM. Highlights include model import for keras, tensorflow, and onnx/pytorch, a modular and tiny c++ library for running math code and a java based math library on top of the core c++ library. Also includes samediff: a pytorch/tensorflow like library for running deep learning using automatic differentiation.
skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
Scio - A Scala API for Apache Beam and Google Cloud Dataflow.
bsc - Bluespec Compiler (BSC)