XiangShan
microwatt
| XiangShan | microwatt | |
|---|---|---|
| 32 | 19 | |
| 4,318 | 644 | |
| 1.2% | - | |
| 9.9 | 6.7 | |
| 6 days ago | 24 days ago | |
| Scala | Verilog | |
| GNU General Public License v3.0 or later | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
XiangShan
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Loongson 3A6000: A Star Among Chinese CPUs
Are you calling for the government to pick a winner? The Chinese word for this fierce if at times chaotic competition is "juan". It worked for them in EV and PV. The outcome remains to be seen in chips and commercial space launches. But even their mostly (ex-)students-run open source Xiangshan RiscV project https://github.com/OpenXiangShan/XiangShan shows a remarkable level of sophistication.
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MRISC32 – An Open 32-Bit RISC/Vector ISA (Suitable for FPGA CPU)
> Certainly no RISC-V implementations that are in the hands of customers right now do any fusion and it doesn't seem to hurt their ability to match or exceed the performance of similar Arm cores (A55, A72).
You can play around with OpenXianShan though, they have a few fusion targets: https://github.com/OpenXiangShan/XiangShan/blob/master/src/m...
Most of the targets require the same destination, so it won't be able to fuse current codegen. I suppose there is still some time before compilers need to be ready, but it's not that much.
> Perhaps they will provide compiler patches if required.
I hope so, btw t-head seems to be still be trying to upstream XTheadVector: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/64278...
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Ask HN: Are there any open source dual-issue RISC-V processor
This is the most advanced open source risc-v implementation I'm awair of: https://github.com/OpenXiangShan/XiangShan
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How can I leverage RISC-V in my final year Electrical & Electronics Engineering project? Seeking advice and project ideas.
Maybe implement a big feature for a open source design? like vroom or xiangshan.
- 大炼芯运动彻底破产，跪舔韩国要技术
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New processor, OS to propel open-source chip ecosystem
I did know about XiangShan, but not Aolai. Is it a Linux distribution?
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How to build a Startup use open source chips
If you are interested in high performance look into vroom , c910 and xianghan, maybe you could adopt one of them.
- Open-source high-performance RISC-V processor
microwatt
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Microwatt: A tiny Open POWER ISA softcore written in VHDL 2008
My favorite part of this project is the pretty large battery of test cases. A lot of chip rtl releases don't bother with open sourcing the verification too, and that's arguably more useful than the rtl in the first place.
https://github.com/antonblanchard/microwatt/tree/master/test...
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Arm wants to charge dramatically more for chip licenses
MicroWatt is the only one I know of.
https://github.com/antonblanchard/microwatt
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RISC-V Pushes into the Mainstream
I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers.
If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.
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How long until RISC gets adopted for the desktop?
Not true, as of 2019 the power ISA is able to be used without needing to pay any royalties to ibm under the openpower foundation. There's already a few projects that have taken advantage of it such as libreSOC and Microwatt. Source code for various firmware components are also freely available pertaining to the power platform.
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Build Open Silicon with Google
https://github.com/antonblanchard/microwatt is an example of a Linux-capable 64-bit core that has been submitted on multiple Open MPW shuttles:
- Any raw binary generic platform-agnostic test roms for PowerPC?
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What would you think if the Amiga line jumped from PowerPc to RISC-V CPUs?
GitHub https://github.com/openpower-cores https://github.com/antonblanchard/microwatt
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Keeping POWER relevant in the open source world
At the other end of the scale, if anyone wants to play you can run a little openpower CPU on a FPGA with completely open source. https://github.com/antonblanchard/microwatt
It's capable of running Linux, some example docs are https://shenki.github.io/boot-linux-on-microwatt/
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What is your take on ISA architectures for FPGAs (x86, arm, risc-v)?
Why dismiss POWER or SPARC ? :-)
What are some alternatives?
openc910 - OpenXuantie - OpenC910 Core
chiselwatt - A tiny POWER Open ISA soft processor written in Chisel
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
midimonster - Multi-protocol control & translation software (ArtNet, MIDI, OSC, sACN, ...)
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
Apollo-11 - Original Apollo 11 Guidance Computer (AGC) source code for the command and lunar modules.
peakperf - Achieve peak performance on x86 CPUs and NVIDIA GPUs
OpenSkyStacker - Multi-platform stacker for deep-sky astrophotography.
chisel - Chisel: A Modern Hardware Design Language
VexRiscvBPluginGenerator
redroid-doc - redroid (Remote-Android) is a multi-arch, GPU enabled, Android in Cloud solution. Track issues / docs here
librealsense - Intel® RealSense™ SDK