WARP_Core
Wilson AXI RISCV Processor Core (by AEW2015)
BYU_PYNQ_PR_Video_Pipeline_Hardware
BYU Pynq PR Video Pipeline Hardware (by byuccl)
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WARP_Core | BYU_PYNQ_PR_Video_Pipeline_Hardware | |
---|---|---|
2 | 2 | |
7 | 7 | |
- | - | |
0.0 | 0.0 | |
almost 4 years ago | over 4 years ago | |
VHDL | VHDL | |
- | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
WARP_Core
Posts with mentions or reviews of WARP_Core.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-06-29.
-
Uploading software program to a custom processor design on a Nexys A7
HW: https://github.com/AEW2015/WARP_Core/blob/master/Projects/P_Test/Src/hdl/bscan_if.vhd
- Share some github FPGA projects (bonus if they include C++, Python, or other files)
BYU_PYNQ_PR_Video_Pipeline_Hardware
Posts with mentions or reviews of BYU_PYNQ_PR_Video_Pipeline_Hardware.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-11-15.
-
References for video system design on FPGAs.
Here is my example: Thesis: https://scholarsarchive.byu.edu/etd/8620/ HW: https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline_Hardware SW: https://github.com/byuccl/BYU_PYNQ_PR_Video_Pipeline
- Share some github FPGA projects (bonus if they include C++, Python, or other files)
What are some alternatives?
When comparing WARP_Core and BYU_PYNQ_PR_Video_Pipeline_Hardware you can also consider the following projects:
soft_riscv - Soft-core RISCV processor for RISCV 2018 competition
verilog-ethernet - Verilog Ethernet components for FPGA implementation
SpinalHDL - Scala based HDL
SBusFPGA - Stuff to put a FPGA in a SBus system (SPARCstation)
verilog-wishbone - Verilog wishbone components
fiate - Fault Injection Automatic Test Equipment
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
litex - Build your hardware, easily!
WARP_Core vs soft_riscv
BYU_PYNQ_PR_Video_Pipeline_Hardware vs verilog-ethernet
WARP_Core vs verilog-ethernet
BYU_PYNQ_PR_Video_Pipeline_Hardware vs SpinalHDL
WARP_Core vs SBusFPGA
BYU_PYNQ_PR_Video_Pipeline_Hardware vs SBusFPGA
WARP_Core vs SpinalHDL
BYU_PYNQ_PR_Video_Pipeline_Hardware vs verilog-wishbone
WARP_Core vs fiate
BYU_PYNQ_PR_Video_Pipeline_Hardware vs satcat5
WARP_Core vs neorv32
BYU_PYNQ_PR_Video_Pipeline_Hardware vs litex