IIC-OSIC-TOOLS
spydrnet
IIC-OSIC-TOOLS | spydrnet | |
---|---|---|
5 | 1 | |
231 | 79 | |
4.3% | - | |
9.3 | 6.8 | |
8 days ago | about 2 months ago | |
Python | Python | |
Apache License 2.0 | BSD 3-clause "New" or "Revised" License |
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IIC-OSIC-TOOLS
- Study Group for Analog IC Design
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Recommendations for how to build a VLSI Analog Neural Network with Open Source Tools?
Will be doing a project using open source EDA tools (from here: https://github.com/iic-jku/iic-osic-tools) to design a VLSI analog neural network. Was wondering if there are any tutorials, resources, or other tools you guys would recommend that would provide some guidance in order to make this VLSI analog neural network?
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IHP open source 130 nm BiCMOS PDK with 500 GHz fmax transistors
For this PDK there is only limited support (it is only in preview!) for klayout and ngspice - which are a FOSS and circuit simulator respectively. If you want to play with whats available, someone put up a colab script here:
https://colab.research.google.com/gist/proppy/f63686b02309e2...
The other two open PDKs, SKY130 and GF180MCU, have a more complete ecosystem the major tools being the opencircuitdesign suite, xschem and the OpenRoad project. If you're still interested, there's an easy to use docker container that has most of the tools in question already installed:
https://github.com/iic-jku/iic-osic-tools
- Alternatives to Cadence Virtuoso
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skywater pdk for IC Design
install Docker, clone iic-osic-tools github and run start_x.sh or start_vnc.sh. It's a virtual docker-container where all tools are pre-installed and configured
spydrnet
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Is there a minimal HDL?
Here is a python tool to modify netlist / edit files. https://github.com/byuccl/spydrnet
What are some alternatives?
IHP-Open-PDK - 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
difw - Expressive diffeomorphic transformations based on the closed-form integration of continuous piecewise affine velocity functions.
learn-sky130 - Learning to do things with the Skywater 130nm process
naja-verilog - A standalone structural (gate-level) verilog parser
gmid - Python script for generating lookup tables for the gm/ID design methodology and much more ...
stargan2 - StarGAN2 for practice
OpenTimer - A High-performance Timing Analysis Tool for VLSI Systems
OpenRAM - An open-source static random access memory (SRAM) compiler.