Python-fpga-interchange Alternatives

Similar projects and alternatives to python-fpga-interchange based on common topics and language

chisel

25 3,717 9.7 Scala python-fpga-interchange VS chisel

Chisel: A Modern Hardware Design Language (by chipsalliance)
f4pga-arch-defs

19 248 7.7 Jupyter Notebook python-fpga-interchange VS f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
InfluxDB

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firrtl

4 694 0.0 Scala python-fpga-interchange VS firrtl

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netlistsvg

4 585 3.1 JavaScript python-fpga-interchange VS netlistsvg

draws an SVG schematic from a JSON netlist
ideas

2 86 0.0 python-fpga-interchange VS ideas

Random ideas and interesting ideas for things we hope to eventually do. (by f4pga)
f4pga-examples

1 260 4.3 Verilog python-fpga-interchange VS f4pga-examples

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a better python-fpga-interchange alternative or higher similarity.

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python-fpga-interchange reviews and mentions

Posts with mentions or reviews of python-fpga-interchange. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-02-12.

FPGA Interchange format to enable interoperable FPGA tooling
6 projects | news.ycombinator.com | 12 Feb 2022

Or BLIF or EBLIF (already used by the verilog-to-routing flow). But no, let's invent yet another netlist format.
The fact that all of these existing formats are all named "xxx logic interchange format" should give you an idea what will happen to this new "interchange format".
From what I gather ( https://github.com/SymbiFlow/python-fpga-interchange/blob/ma... ) , the new format is basically the existing Yosys/nextpnr JSON format except dumped as a Cap'n Proto binary file.
I am absolutely not impressed.
I guess the meat here is on the universal device resources format, but this is not cool anyway.

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chipsalliance/python-fpga-interchange is an open source project licensed under ISC License which is an OSI approved license.

The primary programming language of python-fpga-interchange is Python.

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