Control_cpu Alternatives

control_cpu reviews and mentions

• Best tutorial on DDR protocol
  3 projects | /r/FPGA | 11 May 2023

  I ended up using both, though you'd be excused for not seeing that from my design. This design was meant to be absolutely minimal in size, and one of the ways it does this is by assuming there is a CPU involved. So a lot of the DDR initialization is done in software (you can find it here). All register assignment and mode switching is done from there, as well as entering and leaving the write leveling mode and the whole read calibration logic.

• How can "worst negative slack" become _worse_ when I *lower* the clock?
  1 project | /r/FPGA | 21 Jan 2023

  In case anyone is interested, the design is at https://github.com/CompuSAR/control_cpu. You'll need to fetch the submodules (git submodule update --init) and erase the mcp file from the project for Vivado to generate it. The code as is in the repo is at 100MHz, which passes timing. Raising it to 120MHz or to 115MHz shows the problem. The clock speed register is set from a localparam at top.sv line 51.