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CocoTB (Python): I like this python test library. It easy to use, lot's of library to test i2c, uart, wishbone, ... And ... it's Python it's easy ! You can use the simulator you want and even switch between several without big problems. But it's slow simulation even with Verilator (beta) as backend.
Verilator (C++): I'm using Verilator with my own C++ classes to speed up simulation. This is the fastest solution by far for simulation time. But writing the testbench is not easy and It seems like we spend our time reinventing the wheel.
Formal (Yosys-smtbmc/chisel-formal): This is a really different approach to simulation with property checking. I first tryied it on generated verilog, then with chisel-formal module. This is a solution that is not yet mature for Chisel in my opinion.