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riscv-eabi-spec
Discontinued Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.
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There is an "embedded ABI" under development which vastly reduces the number of "a" and "t" registers. The current proposal is for 4 argument registers and 2 temporary registers, for a total of 6 (plus RA of course): https://github.com/riscv/riscv-eabi-spec/blob/master/EABI.adoc
Per your last point, I believe this is the most important one. Big vendors like WD can just design their own core and plop it down in all of their hard drives that ship in large volumes. They even share their RTL.
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