VHDL Axi4 Projects

AXI4

4 103 7.6 VHDL

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components
spi-to-axi-bridge

1 31 0.0 VHDL

An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
InfluxDB

www.influxdata.com featured

Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

VHDL Axi4 related posts

I made an AXI introduction video! including an AXI-Lite master read and write example!

2 projects | /r/FPGA | 2 Feb 2023
Verilog Text Book Recommendations?

3 projects | /r/Verilog | 15 Feb 2022

Index

	Project	Stars
1	AXI4	103
2	spi-to-axi-bridge	31

VHDL Axi4

VHDL Axi4 Projects

AXI4

spi-to-axi-bridge

InfluxDB

VHDL Axi4 related posts

I made an AXI introduction video! including an AXI-Lite master read and write example!

Verilog Text Book Recommendations?

Index