Verilog skywater

Open-source Verilog projects categorized as skywater
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Topics: Serdes openlane digitalarchitecture openpdk
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Verilog skywater Projects

  • OpenSERDES

    Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

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NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Verilog skywater related posts

  • Kickstarting IC design

    2 projects | /r/chipdesign | 3 Dec 2021

  • How are modern processors and their architecture designed?

    4 projects | /r/ECE | 28 Sep 2021

Index

Project Stars
1 OpenSERDES 115

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