vhdl-style-guide
Style guide enforcement for VHDL (by jeremiah-c-leary)
style-guides
lowRISC Style Guides (by lowRISC)
| vhdl-style-guide | style-guides | |
|---|---|---|
| 1 | 6 | |
| 173 | 331 | |
| - | 3.3% | |
| 9.1 | 4.9 | |
| 6 days ago | 5 months ago | |
| Python | ||
| GNU General Public License v3.0 only | Creative Commons Attribution 4.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
vhdl-style-guide
Posts with mentions or reviews of vhdl-style-guide.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-24.
style-guides
Posts with mentions or reviews of style-guides.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-24.
- should Verilog filenames match module names?
-
Beginner guidance
I also highly recommend studying these coding standards https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md there is a wealth of hard earned asic design hidden in there.
- Blog this week, 10 Rules for HDL development - What would you add?
-
Dos and Dont's for digital design
Always follow the rtl coding guideline such as https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md .
-
Good resources for systemverilog?
lowRISC Verilog Coding Style Guide is very helpful for format/style.
-
Code Reviews
You may be interested in our style guides at lowRISC. We publish our styles guides for SystemVerilog, split into synthesizable and DV guides here: https://github.com/lowRISC/style-guides
What are some alternatives?
When comparing vhdl-style-guide and style-guides you can also consider the following projects:
django-api-domains - A pragmatic styleguide for Django API Projects
VHDL_Coding_Rules - Adiuvo Coding rules for Space
python-blueprint - 🐍 Example Python project using best practices 🥇
owasp-masvs - The OWASP MASVS (Mobile Application Security Verification Standard) is the industry standard for mobile app security.
advent-of-code-2022-no-imports-python3 - advent of code in python without importing any libraries
c-code-style - Recommended C code style and coding rules for standard C99 or later