style-guides
lowRISC Style Guides (by lowRISC)
VHDL_Coding_Rules
Adiuvo Coding rules for Space (by AdiuvoEngineering)
style-guides | VHDL_Coding_Rules | |
---|---|---|
6 | 1 | |
334 | 8 | |
3.0% | - | |
4.9 | 0.0 | |
6 months ago | over 2 years ago | |
Creative Commons Attribution 4.0 | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
style-guides
Posts with mentions or reviews of style-guides.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-24.
- should Verilog filenames match module names?
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Beginner guidance
I also highly recommend studying these coding standards https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md there is a wealth of hard earned asic design hidden in there.
- Blog this week, 10 Rules for HDL development - What would you add?
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Dos and Dont's for digital design
Always follow the rtl coding guideline such as https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md .
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Good resources for systemverilog?
lowRISC Verilog Coding Style Guide is very helpful for format/style.
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Code Reviews
You may be interested in our style guides at lowRISC. We publish our styles guides for SystemVerilog, split into synthesizable and DV guides here: https://github.com/lowRISC/style-guides
VHDL_Coding_Rules
Posts with mentions or reviews of VHDL_Coding_Rules.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-15.
-
Code Reviews
They are here https://github.com/AdiuvoEngineering/VHDL_Coding_Rules
What are some alternatives?
When comparing style-guides and VHDL_Coding_Rules you can also consider the following projects:
vhdl-style-guide - Style guide enforcement for VHDL