upduino-projects
Various VHDL projects I've worked on for the Upduino v2.0 and v3.0 (by nobodywasishere)
es4
Code for Tufts ES4 Intro to Digital Electronics (by controversial)
upduino-projects | es4 | |
---|---|---|
3 | 2 | |
6 | 2 | |
- | - | |
0.0 | 0.0 | |
over 1 year ago | almost 3 years ago | |
VHDL | VHDL | |
GNU General Public License v3.0 only | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
upduino-projects
Posts with mentions or reviews of upduino-projects.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-04-24.
- Does any one knows the vhdl code for (7,4) hamming code decoder?
- Using HOSC_CORE (Lattice Radiant, Ice40up5k, Synplify Pro, VHDL)
-
https://np.reddit.com/r/FPGA/comments/mro9hr/using_hosc_core_lattice_radiant_ice40up5k/gvsk3vg/
That'll give you the 48MHz clk. In the open source toolchain, you'd just change HSOSC to SB_HFOSC. More information about how to use the open source toolchain for VHDL (ghdl + yosys + icestorm + nextpnr) can be found in a few repos: - https://github.com/nobodywasishere/upduino-projects - https://github.com/controversial/es4 - https://github.com/YosysHQ/fpga-toolchain
es4
Posts with mentions or reviews of es4.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-04-24.
- Using HOSC_CORE (Lattice Radiant, Ice40up5k, Synplify Pro, VHDL)
-
https://np.reddit.com/r/FPGA/comments/mro9hr/using_hosc_core_lattice_radiant_ice40up5k/gvsk3vg/
That'll give you the 48MHz clk. In the open source toolchain, you'd just change HSOSC to SB_HFOSC. More information about how to use the open source toolchain for VHDL (ghdl + yosys + icestorm + nextpnr) can be found in a few repos: - https://github.com/nobodywasishere/upduino-projects - https://github.com/controversial/es4 - https://github.com/YosysHQ/fpga-toolchain
What are some alternatives?
When comparing upduino-projects and es4 you can also consider the following projects:
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
fpga-toolchain - Multi-platform nightly builds of open source FPGA tools
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog
spi-fpga - SPI master and SPI slave for FPGA written in VHDL
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL
ghdl - VHDL 2008/93/87 simulator
neo430 - :computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.