spin-servo-drive
f4pga
| spin-servo-drive | f4pga | |
|---|---|---|
| 1 | 6 | |
| 50 | 317 | |
| - | 3.8% | |
| 9.3 | 1.6 | |
| 6 days ago | 8 days ago | |
| Python | Python | |
| MIT License | Apache License 2.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
spin-servo-drive
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Show HN: Atopile – Design circuit boards with code
Hey everyone, if you want to see a complete project, please check out the Spin Servo Drive that Narayan designed: https://github.com/atopile/spin-servo-drive
It can be a good example of how to setup an ato project.
f4pga
- Show HN: Atopile – Design circuit boards with code
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AMD Proposes an FPGA Subsystem User-Space Interface for Linux
I hope AMD sees the light and helps F4FPGA develop a more complete open source toolchain for their FGPAs (https://f4pga.org). With this subsystem and an open source compilation flow, FGPA experiments would be way easier.
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
I tried to get LiteX to work with F4PGA, an open source FPGA toolchain, instead of the Xilinx tools, but it was a huge hassle. Just use LiteX with the Xilinx tools.
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Running Linux on Xilinx / AMD FPGA Softcore Example Design
Not really, at least not apples-apples for something like a Pi.
There are a couple of different aspects to this, one is that soft-logic it typically slower than hard-logic so you just can't get comparable frequencies out of a soft implementation. For datapath designs, this is typically solved by going wider, but that isn't quite as helpful or practical for all aspects of a processor implemented in soft logic.
If you look at the specs for this softcore processor, they have much less performance than a Pi, even when you're using some of the biggest and more $$ families of FPGAs: https://www.xilinx.com/products/design-tools/microblaze.html....
I'd say that is on-part with similar complexity soft-core CPUs from other vendors or even open-source ones.
With respect to the design transparency, it kind of depends on how much you care about the black-box compilers required to use a lot of these advanced chips. You can feed open-source RTL into them, but there's still a proprietary black-box compiler/fitter/place-route etc for a lot of these.
There's some work toward open toolchains from yosys and https://f4pga.org/, but none of the big FPGA companies seem very bought-in or willing to help a, so it's been a community best-effort, and for some of the fancier devices, you still have to use the proprietary tools to build bitstreams.
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Newbie's complaints about Xilinx software
I am a believer that the open source days will come: https://f4pga.org/
- Symbiflow: The GCC of the FPGA World
What are some alternatives?
icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
docs - Documentation site
prjtrellis - Documenting the Lattice ECP5 bit-stream format.
atopile - Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️
prjxray - Documenting the Xilinx 7-series bit-stream format.
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
sphinxcontrib-hdl-diagrams - Sphinx Extension which generates various types of diagrams from Verilog code.
symbiflow-xc7z-automatic-tester - Tool for automatically testing FPGA designs using a Zynq Series 7 board.
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
litex - Build your hardware, easily!