simple10GbaseR
FPGA low latency 10GBASE-R PCS (by 0xDEBB20E3)
openfpga-NES
NES for the Analogue Pocket (by agg23)
| simple10GbaseR | openfpga-NES | |
|---|---|---|
| 1 | 1 | |
| 4 | 185 | |
| - | - | |
| 0.0 | 6.1 | |
| almost 2 years ago | 30 days ago | |
| SystemVerilog | SystemVerilog | |
| MIT License | GNU General Public License v3.0 only |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
simple10GbaseR
Posts with mentions or reviews of simple10GbaseR.
We have used some of these posts to build our list of alternatives
and similar projects.
openfpga-NES
Posts with mentions or reviews of openfpga-NES.
We have used some of these posts to build our list of alternatives
and similar projects.
What are some alternatives?
When comparing simple10GbaseR and openfpga-NES you can also consider the following projects:
analogue-pocket-utils - Collection of IP and information on how to develop for openFPGA and Analogue Pocket
hdmi - Send video/audio over HDMI on an FPGA
pocket-sync - A GUI tool for doing stuff with the Analogue Pocket
fpga_screensaver - This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board.
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
openfpga-SNES - SNES for the Analogue Pocket
axi - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Cores-VeeR-EH1 - VeeR EH1 core