shecc
selfie
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shecc | selfie | |
---|---|---|
6 | 21 | |
1,038 | 2,347 | |
4.7% | 0.9% | |
8.7 | 9.6 | |
21 days ago | 6 days ago | |
C | Jupyter Notebook | |
BSD 2-clause "Simplified" License | BSD 2-clause "Simplified" License |
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shecc
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A self-hosting and educational C optimizing compiler
Yes, consider the case of shecc. It requires just a handful of C code lines to interpret directives set in the C preprocessor. Unlike relying on existing tools like cpp, as, or ld, shecc stands alone as a minimalist cross-compiler. This design could be particularly beneficial for students delving into the study of compiler construction. See https://github.com/sysprog21/shecc/blob/master/src/lexer.c#L...
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Compiler Class
I'm looking at this one for a CPU design I've been working on. :)
https://github.com/jserv/shecc
- Shecc: Self-hosting and educational C compiler
- shecc: self-hosting and educational C compiler
- shecc: Self-hosting and educational C compiler
selfie
- A tiny hand crafted CPU emulator, C compiler, and Operating System
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Project Oberon the Design of an Operating System, a Compiler, and a Computer Pdf
this sort of exists at https://github.com/cksystemsteaching/selfie
> Selfie is a self-contained 64-bit, 12KLOC C implementation of: (...) a tiny (...) subset of C called C Star (C) (...) to a tiny (...) subset of RISC-V called RISC-U[;] a[n] (...) emulator (...) that executes RISC-U code[;] (...) a (...) hypervisor (...) that provides RISC-U virtual machines*
so they have an instruction set architecture, a compiler, and an operating system, though it's much simpler than xv6. because the instruction set is a subset of risc-v you can run its code on actual risc-v hardware (or qemu-system-riscv), but presumably you could also design risc-u hardware in verilog that was simpler than a full implementation of rv64i with whatever extensions the hypervisor needs
- Best book on writing an optimizing compiler (inlining, types, abstract interpretation)?
- Selfie: An educational platform for teaching systems engineering
- An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor.
- Selfie: An Educational Platform For Teaching Systems Engineering
What are some alternatives?
dji-firmware-tools - Tools for handling firmwares of DJI products, with focus on quadcopters.
oscam-patched - Open Source Cam Emulator
spu32 - Small Processing Unit 32: A compact RV32I CPU written in Verilog
coollang-2020-fs - Compiler of a small Scala subset
chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
perseus - A state-driven web development framework for Rust with full support for server-side rendering and static generation.
scamp-cpu - A homebrew 16-bit CPU with a homebrew Unix-like-ish operating system.
bsod-kernel-fuzzing - BSOD: Binary-only Scalable fuzzing Of device Drivers
the_ray_tracer_challenge_in_rust - Repository to follow my development of "The Raytracer Challenge" book by Jamis Buck in the language Rust
amacc - Small C Compiler generating ELF executable Arm architecture, supporting JIT execution
ld - LambdaDelta