psram-tang-nano-9k
hdl
| psram-tang-nano-9k | hdl | |
|---|---|---|
| 7 | 5 | |
| 44 | 1,383 | |
| - | 2.3% | |
| 0.0 | 9.1 | |
| over 1 year ago | 2 days ago | |
| Verilog | Verilog | |
| Apache License 2.0 | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
psram-tang-nano-9k
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Using the OSS PsramController with both dies
See my reply here: https://github.com/zf3/psram-tang-nano-9k/issues/6
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Open HyperRAM interface for Nano 9K
I added a note about his to the controller's readme. "Quick discussion about going above 83Mhz".
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Gowin: PSRAM unusable on Tang Nano 9K: stuck in Wrapped Burst mode in read and write operations (HyperRAM on Tang Nano 4K works OK with Linear Bursts)
Another difference that I find in that W955D8MBYA data sheet compared to W955N8MBY, is that W955D8MBYA does not mention anywhere that differential signaling would be optional: but instead it marks it as required. If that is the case, then the question for Best Behavior(tm) of how to properly feed it LVDS does rise again. ( https://github.com/zf3/psram-tang-nano-9k/issues/1 )
- An open source PSRAM/HyperRAM controller for Tang Nano 9k
hdl
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Timing diagram help
Have you thought about using ADs source code and pulling what you need to create a front end to their device?
- Vivado 2020.2 IP Repository Suggestion
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Anyone else feeling extremely frustrated with Xilinx?
The reference designs from Analog Devices are all hand coded complex block designs for both Intel and Xilinx: https://github.com/analogdevicesinc/hdl
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Intel Quartus Version Control?
There’s 100 million ways people skin this cat. Some people guard this like it’s fort know. ADI publishes theirs on GitHub in adi_hdl that supports both vivado and quartus. https://github.com/analogdevicesinc/hdl
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Industry development process?
I haven't used this repo, but something like this https://github.com/analogdevicesinc/hdl/tree/master/library
What are some alternatives?
uhd - The USRP™ Hardware Driver Repository
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
nano4k_hdmi_tx - Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K
livehd - Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
serv - SERV - The SErial RISC-V CPU
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
psram-tang-nano-9k - An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA
NTHU-ICLAB - 清華大學 | 積體電路設計實驗 (IC LAB) | 110上
FPGA_SDRAM_Controller - SDRAM controller optimized to a memory bandwidth of 316MB/s
corundum - Open source FPGA-based NIC and platform for in-network compute