openc910
rpi-open-firmware
openc910 | rpi-open-firmware | |
---|---|---|
42 | 12 | |
1,047 | 416 | |
2.7% | 0.2% | |
1.3 | 4.4 | |
5 months ago | 3 months ago | |
Verilog | C | |
Apache License 2.0 | GNU General Public License v3.0 or later |
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Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
openc910
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US Government reportedly ponders crimping China's use of RISC-V
> I'm pretty sure that SiFive isn't allowed to sell their RISC-V core designs to any Chinese company already.
The JH7110 SoC from the Chinese firm Starfive uses SiFive's U74 core. Eswin, also Chinese uses SiFive's P550 core in their upcoming EIC7700 SoC.
> All Chinese RISC-V core designs have been proprietary designs thus far.
There is the OpenC910 [1] and OpenXiangShan [2].
[1] https://github.com/T-head-Semi/openc910
- Lichee Console 4A β RISC-V mini laptop: Review, benchmarks and early issues
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Is RISC-V ready for HPC? Evaluating the 64-core Sophon SG2042 RISC-V CPU
Note that the C910 CPU cores used in this chip are in fact open source:
https://github.com/T-head-Semi/openc910
(C920 is just C910 plus RVV draft 0.7.1 vector unit which pretty much no software uses anyway, sadly)
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This CPU is FREE!
The Milk-V Pioneer uses a C910 CPU, which has been open sourced by t-head: https://github.com/T-head-Semi/openc910
- LTT
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China Deploys RISC-V Server in Commercial Cloud
More precisely, a Chinese university assembled a rack containing 48 [1] commercially available SBCs [2], each with a Chinese-designed and made SG2042 SoC with 64 C910 CPU cores. The C910 was designed in China in 2018/19 and open-sourced in October 2021, on Microsoft's github site.
https://github.com/T-head-Semi/openc910
The SG2042 is the most powerful RISC-V SoC available today.
In which direction is the technology transfer going?
[1] or possibly 24 dual-socket boards, shown at the RISC-V Summit China in August
[2] get your own here https://www.crowdsupply.com/milk-v/milk-v-pioneer
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Raspberry Pi receives strategic investment from Arm
For "coming down the pipeline" they're essentially free.
Today, the c910 is an Apache 2, hardware proven out of order core on GitHub here https://github.com/T-head-Semi/openc910 a little slower than an RPi3's core.
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Lichee Pi 4A: Serious RISC-V Desktop Computing [video]
Here is the source code* for the CPU:
https://github.com/T-head-Semi/openc910
* AFAIK they didn't opensource the pre ratification vector extension implementation they ship with the taped out chip.
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Beagleboard BeagleV-Ahead RISC-V brd released
The source RTL for the roughly Arm A72-equivalent cores used in this were open-sourced several years ago.
https://github.com/T-head-Semi/openc910
The same cores are used in the 64 core SG2042 workstation/server SoC.
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ARMβs Cortex A53: Tiny but Important
It's a shame, because it was the best design from ARM; they're now focusing on Cortex-A7x and Cortex-X, which aren't anywhere as power efficient[0].
Meanwhile, their revised Cortex-A57 has been surpassed in performance/power/area by several RISC-V microarchitectures, such as SiFive's U74[1], used in the VisionFive2 and Star64, or even the open source XuanTie C910[2][3].
0. https://www.youtube.com/watch?v=s0ukXDnWlTY
1. https://www.sifive.com/cores/u74
2. https://xrvm.com/cpu-details?id=4056743610438262784
3. https://github.com/T-head-Semi/openc910
rpi-open-firmware
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Raspberry Pi receives strategic investment from Arm
> Please correct me if I'm wrong.
My memory told me it was the GPU that needed the blobs. So I asked at DDG
https://duckduckgo.com/?t=ftsa&q=binary+blobs+and+the+Raspbe...
Turned up this: https://wiki.debian.org/RaspberryPi and it says...
> All Raspberry Pi models before the 4 (1A, 1B, 1A+, 1B+, Zero, Zero W, 2, 3, Zero 2 W) boot from their GPU (not from the CPU!), so they require a non-free binary blob to boot
So the 4 (and I suppose the 5, if it ever actually comes...)
Goes on to say:
> Since then, Broadcom publicly released some code, licensed as 3-Clause BSD, to aid the making of an open source GPU driver. The "rpi-open-firmware" effort to replace the VPU firmware blob started in 2016. See more at https://news.ycombinator.com/item?id=11703842 . Unfortunately development of rpi-open-firmware is currently (2021-06) stalled.
So there you are. Not wrong, are you, but not strictly correct, depending on "...to run properly" definition
https://github.com/librerpi/rpi-open-firmware has updates 3-months ago
- LibreRPi β open source replacements for RPi firmware
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How is the free firmware for the Raspberry progressing?
many of those demos work on the the entire pi model range
pi3 support is only broken due to arm side problems, which could be fixed by just using a different bootloader
and the https://github.com/librerpi/rpi-open-firmware codebase can already boot linux headlessly on both pi2 and pi3, it uses a different arm bootloader
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Arduino Pro hardware is not open-source hardware
Yes, and some folks are reverse engineering their stuff:
https://github.com/librerpi/rpi-open-firmware/
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Hacker News top posts: Feb 25, 2021
rpi-open-firmware: open-source VPU side bootloader for Raspberry Pi\ (35 comments)
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rpi-open-firmware: open-source VPU side bootloader for Raspberry Pi
There is work being done on the RPi4, for example the SHA1 HMAC protecting the boot on the RPi4 had to be cracked (and was easily), I hear future versions have RSA signing support, so the proprietary firmware might become mandatory at some point.
https://github.com/librerpi/rpi-open-firmware/blob/master/do...
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AArch64 Boards and Perception
There is a project to create an open source version of the proprietary GPU firmware that boots into the ARM processor:
https://github.com/librerpi/rpi-open-firmware
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Taking a Stand in the War on General-Purpose Computing
I note that even the Raspberry Pi is moving towards locked down devices, the RPi4 has an (easily cracked) HMAC blocking booting into the open source firmware and I hear more recent hardware editions have RSA signing support in the bootrom code.
https://github.com/librerpi/rpi-open-firmware/blob/master/do...
What are some alternatives?
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
OpenBBTerminal - Investment Research for Everyone, Everywhere.
openc906 - OpenXuantie - OpenC906 Core
tl - The compiler for Teal, a typed dialect of Lua
XiangShan - Open-source high-performance RISC-V processor
PrawnOS - Libre Mainline Kernel and Debian for arm laptops
aosp-riscv - Patches & Script for AOSP to run on Xuantie RISC-V CPU [Moved to: https://github.com/T-head-Semi/riscv-aosp]
lk-overlay
seL4 - The seL4 microkernel
serverlessui - A command-line utility for deploying serverless applications to AWS. Complete with custom domains, deploy previews, TypeScript support, and more.
awesome-riscv - π A curated list of awesome RISC-V implementations
java-keyring - Copy of Java Keyring library from bitbucket.org/bpsnervepoint -- with working CI in for osx/linux/windows keystore.