naja-verilog
Degate
naja-verilog | Degate | |
---|---|---|
2 | 2 | |
21 | 230 | |
- | 3.0% | |
7.6 | 5.7 | |
about 1 month ago | 3 months ago | |
C++ | C++ | |
Apache License 2.0 | GNU General Public License v3.0 only |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
naja-verilog
-
Naja-Verilog: stand-alone structural (gate-level) parser
Hi everyone, If you need to build C++ (or Python) application loading gate level verilog, similar to the one at the input of FPGA PnR tools, https://github.com/xtofalex/naja-verilog is available. This parser has been designed to allow the construction on the fly of any netlist data structure. One note: if you need also a C++ netlist data structure (with Python bindings) to build netlist analysis or editing tools on top, Naja SNL: https://github.com/xtofalex/naja is also ready for use. Hope this is useful. If it is or if you face any issue, please reach to me. Feedback welcome.
- Show HN: Naja-Verilog – Structural Verilog Parser
Degate
What are some alternatives?
hdlConvertor - Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
sub3suite - a free, open source, cross platform Intelligence gathering tool.
verilator - Verilator open-source SystemVerilog simulator and lint system
mXtract - mXtract - Memory Extractor & Analyzer
Surelog - SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
OpenFusion - Open source server for the FusionFall client
naja - Structural Netlist API (and more) for EDA post synthesis flow development
ImHex - 🔍 A Hex Editor for Reverse Engineers, Programmers and people who value their retinas when working at 3 AM.
spydrnet - A flexible framework for analyzing and transforming FPGA netlists. Official repository.
RigelEngine - A modern re-implementation of the classic DOS game Duke Nukem II
x64dbg - An open-source user mode debugger for Windows. Optimized for reverse engineering and malware analysis.
cutter - Free and Open Source Reverse Engineering Platform powered by rizin